11918 Verification with System Verilog 79 Packages Creates a scope that

11918 verification with system verilog 79 packages

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1/19/18 Verification with System Verilog 79
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Packages Creates a scope that contains declarations intended to be shared among one or more compilation units, modules, interfaces, or programs. Generally constants, type defs, tasks and functions No hierarchical references allowed 1/19/18 Verification with System Verilog 80
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OOP Concepts 1/19/18 Verification with System Verilog 81
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For more Course Resources, Tutorials see 1/19/18 Verification with System Verilog 82
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What is OOP? OOP is object oriented programming Organize programs in same way as objects are organized in real world Break program into blocks that work together to accomplish a task, each block has a well defined interface Class – A blueprint for a house Program element “containing” related group of features and functionalities Encapsulates functionality Provides a template for building objects 1/19/18 Verification with System Verilog 83
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Class Basics A Class is a description of some group of things that have something in common. Objects are individual instances of “classes”. Example: A class might be “Automobile”. Instances of the “Automobile” class might be “Joe’s car”, “Bob’s car”, “Sally’s truck”, etc. Objects/Classes have: Data Color, speed, direction, etc. Operations/Methods Start, stop, increaseSpeed, turn, etc. Encapsulation: Encapsulate implementation details internal to the object/class. 1/19/18 Verification with System Verilog 84
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Classes Inheritance : (is-a relationship) Allows users to extend existing classes, making minor modifications. Extending the “Automobile” class example, users might create subclasses for “sedan”, “truck”, “van”, etc. The “van” class might also have a “minivan” subclass. Etc. In these cases, the subclass IS-A superclass. i.e. a “sedan” is a “Automobile”. When using inheritance, the sub-class “inherits” all the parents public/protected data properties and methods. It is allowed to override them, or use them as-is. Composition: (has-a relationship) Composition is used for the case where one object HAS-A instance of another class. For example, an “Automobile” class might have 4 instances of a “wheel” class. In this case, a wheel is not an “Automobile”, so inheritance should not be used. 1/19/18 Verification with System Verilog 85
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Classes Polymorphism: Most common definition of polymorphism is the ability of the language to process objects differently depending on their data type or class . System Verilog can only process objects differently depending on their class. The primary usage of polymorphism in industry (object-oriented programming theory) is the ability of objects belonging to different types to respond to method, field, or property calls of the same name, each one according to an appropriate type- specific behavior.
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