However, changing the clock frequency by a factor of k changes the amount of time it takes for
the operation to complete by a factor of 1/k. Since Energy = Power*Time, the net scaling in
energy/operation in the logic is
k
2
.
For the scaling above, the energy per operation becomes
(1
J
+ 0
.
1(2)
J
)(18
/
20)
2
= 0
.
972
J
compared to
1
.
2
J
in the original.
A more substantial energy efficiency improvement can be gained by pipelining the combina
tional logic. When pipelining, the critical path is reduced which allows the clock rate to be
increased without changing
V
dd
. Since this application does not require a clock rate increase,
the clock frequency and
V
dd
can both be scaled down from the new clock frequency made pos
sible by pipelining. The total amount of time an operation take to get through the pipeline
changes to become the number of pipeline stages * the delay through each pipeline stage.
This changes the energy/op scaling factor because power is scaled by
k
3
but time/op is now
scaled by
n/k
. This leads to energy/op scaling by
nk
2
.
Let’s divide the combination logic into 2 equal parts (from the perspective of delay) and insert
a pipeline register between them. We incur the additional energy use of the pipeline register
but can now reduce the combinational logic delay to 8 ns. This leads to a critical path of 10
ns. This allows clock frequency and
V
dd
to be scaled by a factor of
1
/
2
to reach the target clock
frequency of 50 MHz (20 ns period). The total energy per operation of this pipelined version
is
(1
J
+ 0
.
1(3)
J
)(2)(1
/
2)
2
= 0
.
65
J
.
This process can be tried again by splitting the combinational logic into n segments with n1
additional regsiters.
Assuming the combinational logic is evenly split, the critical path when pipelined by an integer
factor
n
is
16
/n
+ 2
ns. The energy/operation is
(1 + 0
.
1(1 +
n
))((16
/n
+ 2)
/
20)
2
n
To find when the energy/op is minimum, we can take the first derivative of the above expression
and get
0
.
027

0
.
704
n

2

0
.
02
n
The only real zero is at
n
≈
4
.
431
.
The second derivative is:
0
.
002 + 1
.
408
n

3
This is positive for
n
≈
4
.
431
identifying
n
≈
4
.
431
as a local minimum.
Since n must be an integer, we will look at
n
= 4
and
n
= 5
Version: 1  20190410 19:32:3107:00
EECS 151/251A Homework 7
11
For
n
= 4
, the critical path delay is
16
/
4 + 2 = 4
/
3
ns. The energy/operation is
(1 + 0
.
1(1 +
4))((16
/
4 + 2)
/
20)
2
(4)
≈
0
.
54
J
.
For
n
= 5
, the critical path delay is
16
/
5 + 2 = 26
/
5
ns. The energy/operation is
(1 + 0
.
1(1 +
5))((16
/
5 + 2)
/
20)
2
(5)
≈
0
.
5408
J
.
Therefore, the minimum energy/operation is achieved for this circuit when pipelined by a factor
of 4 yielding an energy/op of
0
.
54
J
.