HLDTL 126 in a transistor transistor logic TTL if the base collector junction

Hldtl 126 in a transistor transistor logic ttl if the

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126.inatransistor-transistor-logic(TTL), if the base collector junction of atransistor is clamped with a Schottky-diode it becomes Schottky TTL. What is thesignificance of having this diode? 127. PMOS are generally supplied with a voltage up to 15 V 128. NMOS can be interlaced to CMOS by providing a pull-up resistor 129. a digital IC whose output transistor has no internal pull-up resistor. Open-collector configuration 130. in digital ICs, such as buffers and registers, what output configuration is used if they are intended for “busing” ? tri-state output 131. in TTL ICs, which input configurations gives a high-input impedance at both logic states (HIGH and LOW state)? Substrate pnp input 132. what is the purpose of internal clamping diodes at the input of a logic circuit? To minimize negative ringing effects 133. in TTL ICs with more than one gates available, sometimes not all gates are used. How will you handle these unused gates? Force the output to go HIGH 134. how will you handle unused inputs in a logic gate/logic IC? Pull them up or down, depending on circuit function
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