ELEC

# R 1 r 2 x a b v v figure 1018 example 1012 determine

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R 1 R 2 X A B V V Figure 10.18 Example 10.12 Determine the differential gain of the circuit in Fig. 10.19(a) if . Q Q 1 2 V I EE V in1 V in2 CC P V out Q 1 V in1 V out (a) (b) V b R 1 R 2 Q 3 Q 4 R 1 Q 3 Figure 10.19 Solution Drawing one of the half circuits as shown in Fig. 10.19(b), we express the total resistance seen at the collector of as (10.94) Thus, the voltage gain is equal to (10.95) Since the resistors are linear, the signals need not be small in this case.

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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 486 (1) 486 Chap. 10 Differential Amplifiers Exercise Repeat the above example if . Example 10.13 Calculate the differential gain of the circuit illustrated in Fig. 10.20(a) if . Q Q 1 2 V I EE V in1 V in2 CC P V out Q 1 in1 (a) (b) Q R 1 R 2 3 Q 4 X Q R 1 3 X v v out1 Figure 10.20 Solution For small differential inputs and outputs, remains constant, leading to the conceptual half circuit shown in Fig. 10.20(b)—the same as that in the above example. This is because and experience a constant base-emitter voltage in both cases, thereby serving as current sources and exhibiting only an output resistance. It follows that (10.96) Exercise Calculate the gain if V for all transistors, k , and mA. Example 10.14 Determine the gain of the degenerated differential pairs shown in Figs. 10.21(a) and (b). Assume . Solution In the topology of Fig. 10.21(a), node is a virtual ground, yielding the half circuit depicted in
BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 487 (1) Sec. 10.2 Bipolar Differential Pair 487 Q Q 1 2 R V I EE X Y V in1 V in2 CC P C R C R E R E out V Q Q 1 2 R V X Y V in1 V in2 CC C R C out V R E I EE I EE Q 1 in1 R C R E out Q 1 in1 R C R E out 2 (d) (c) (a) (b) v v v v Figure 10.21 Fig. 10.21(c). From Chapter 5, we have (10.97) In the circuit of Fig. 10.21(b), the line of symmetry passes through the “midpoint” of . In other words, if is regarded as two units in series, then the node between the units acts as a virtual ground [Fig. 10.21(d)]. It follows that (10.98) The two circuits provide equal gains if the pair in Fig. 10.21(b) incorporates a total degeneration resistance of . Exercise Design each circuit for a gain of 5 and power consumption of 2 mW. Assume V, , and . I/O Impedances For a differential pair, we can define the input impedance as illustrated in Fig. 10.22(a). From the equivalent circuit in Fig. 10.22(b), we have (10.99)

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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 488 (1) 488 Chap. 10 Differential Amplifiers Q Q 1 2 R V I EE CC C R C X i v X g π v π v π r 1 1 1 m1 g π v 2 m2 v π 2 π r 2 R C R C P v X X i X i (a) (b) Figure 10.22 (a) Method for calculation of differential input impedance, (b) equivalent circuit of (a). Also, (10.100) (10.101) It follows that (10.102) as if the two base-emitter junctions appear in series. The above quantity is called the “differential input impedance” of the circuit. It is also possible to define a “single-ended input impedance” with the aid of a half circuit (Fig. 10.23), obtaining v X i X R V CC C Q 1 Figure 10.23 Calculation of single-ended input impedance.
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