Evaluating equa tion 2 for the circuit of figure 1

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resistor noise contribution in Equation 2. Evaluating Equa- tion 2 for the circuit of Figure 1 will give a total equivalent input noise of 1.4nV/ Hz. This is slightly increased from the 0.95nV/ Hz for the op amp itself due to the contribution of the resistor and bias current noise terms. FREQUENCY RESPONSE CONTROL Voltage feedback op amps exhibit decreasing closed-loop bandwidth as the signal gain is increased. In theory, this relationship is described by the Gain Bandwidth Product (GBP) shown in the specifications. Ideally, dividing GBP by the non-inverting signal gain (also called the Noise Gain, or NG) will predict the closed-loop bandwidth. In practice, this only holds true when the phase margin approaches 90 ° , as it does in high gain configurations. At low gains (increased feedback factors), most high-speed amplifiers will exhibit a more complex response with lower phase margin. The OPA687 is compensated to give a maximally flat 2nd-order Butterworth closed-loop response at a non-inverting gain of +20 (Figure 1). This results in a typical gain of +20 band- width of 290MHz, far exceeding that predicted by dividing the 3600MHz GBP by 20. Increasing the gain will cause the phase margin to approach 90 ° and the bandwidth to more closely approach the predicted value of (GBP/NG). At a gain of +50, the OPA687 will very nearly match the 72MHz bandwidth predicted using the simple formula and the typi- cal GBP of 3600MHz. Inverting operation offers some interesting opportunities to increase the available gain bandwidth product. When the source impedance is matched by the gain resistor (Figure 2), the signal gain is (1 + R F /R G ) while the noise gain for bandwidth purposes is (1 + R F /2R G ). This cuts the noise gain almost in half, increasing the minimum stable gain for inverting operation under these condition to –20 and the equivalent gain bandwidth product to 7.2GHz. DRIVING CAPACITIVE LOADS One of the most demanding, and yet very common, load conditions for an op amp is capacitive loading. Often, the capacitive load is the input of an A/D converter, including additional external capacitance which may be recommended to improve A/D linearity. A high-speed, high open-loop gain amplifier like the OPA687 can be very susceptible to decreased stability and closed-loop response peaking when a capacitive load is placed directly on the output pin. When the amplifier’s open-loop output resistance is considered, this capacitive load introduces an additional pole in the signal path that can decrease the phase margin. Several external solutions to this problem have been suggested. When the primary considerations are frequency response flatness, pulse response fidelity and/or distortion, the sim- plest and most effective solution is to isolate the capacitive load from the feedback loop by inserting a series isolation resistor between the amplifier output and the capacitive load. This does not eliminate the pole from the loop re- sponse, but rather shifts it and adds a zero at a higher frequency. The additional zero acts to cancel the phase lag from the capacitive load pole, thus increasing the phase margin and improving stability.
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13 OPA687 SBOS065A
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