CSC
Assignment2_distributed.pdf

The flip flop input equations and the circuit outputs

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flip-flops A and B, two inputs x and y, and one output z. the flip-flop input equations and the circuit outputs are as follows: J A = (x+y+A+B), K A = (y`+x+A), J B = xy` + AB, K B = xA+yB` Z(t) = A+B i- Draw the logic diagram of the circuit, and select the one that matches yours from the following; a- xy zw 00 01 11 10 00 0 4 12 8 01 1 5 13 9 11 3 7 15 11 10 2 6 14 10 = = = x y A B J A x y` A B K A A J B x A y B` K B B B` y` x A Z
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b- c- x y A B J A x y` A B K A A J B x A y B` K B B B` y` x A Z x y A B J A x y` A B K A A J B x A y B` K B B B` y` x A Z
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d- e- f- None of the above x y A B J A x y` A B K A A J B x A y B` K B B B` y` x A Z x y A B J A x y` A B K A A J B x A y B` K B B B` y` x A Z
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ii- Complete the state table given below A(t) B(t) x y J A K A J B K B A(t+1) B(t+1) Z(t) 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 iii- Draw the state diagram and match it to one of the following; a- b- c- d- e- f- None of the above = 00 01 11 10 00,01/1 00/1 10,11/0 01,10,11/1 0011/1 00,01/1 00 01 11 10 00,01/1 00/1 10,11/0 01,10,11/1 10,11/0 01,10,11/1 00 01 11 10 00,01/1 00/1 10,11/1 01,10,11/1 10,11/0 00 01 11 10 (00/1) 00,01,10,11/1 10/1 00,01/1 10,11/0 00,01,10,11/1 00,01,11/0 (00/0) 01,11/1 00 01 11 10 00,01/1 10/0 10/1 10,11/1 00,01,10,11/1 00,01,11/1 (00/0) 01,11/0
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4. Use D-flip flop to design a sequential circuit for 3-bit counter for even and odd numbers. Use an input x. to control the counter; when x= 0, the state of the counter does not change. When x = 1, the state sequence is incremented to the next count. Use another input y to change from even count to odd count and vice versa. Switching between the even and odd counts is accomplished by y where y=0 is used for the even counts and y=1 is used for the odd counts. The even counts are: 000, 010, 100, 110 , and repeat. The odd counts are: 001, 011, 101, 111, and repeat. When y=0, any odd count is initialized to 000 regardless of the value of x and when y=1, any even count is initialized to 001. i- Construct the state diagram and match it to one of the following; a- b- c- d- = x=0 x=1 x=0 x=1 000 010 100 110 001 011 101 111 x=1 x=0 x=0 x=1 x=0 x=0 x=0 x=1 x=1 x=1 x=1 x=0 y=0 y=1 x=0 x=0 x=0 x=0 000 010 100 111 001 011 101 110 x=1 x=1 x=1 y=1 x=1 x=1 x=1 y=0 x=0 x=0 x=0 x=0 x=0 x=0 x=0 x=0 010 011 100 110 000 101 110 111 x=1 x=1 x=1 x=1 x=1 x=1 x=1 x=1 x=0 x=0 x=0 x=0 y=1 y=1 x=0 x=0 x=0 x=0 000 010 100 110 001 011 101 111 x=1 x=1 x=1 x=1 x=1 x=1 x=1 x=1 x=0 x=0 x=0 x=0 y=0 y=1
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e- f- None of the above ii- Complete the given state table x y A(t) B(t) C(t) A(t+1) B(t+1) C(t+1) D A D B D C 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 x=0 x=0 x=0 x=0 000 010 101 111 001 011 100 110 x=1 x=1 x=1 y=0 x=1 x=1 x=1 y=1 x=0 x=0 x=0 x=0
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iii- Draw the circuit logic diagram and match it to one of the following: a- b- = D A A x y` A C x y A C y` A B` C` x y A B C x y` A B C x y` A B C D B
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  • Spring '10
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