# Are and in the active region to avoid saturation the

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Are and in the active region? To avoid saturation, the collector voltages must not fall below the base voltages: (10.16) revealing that cannot be arbitrarily high. Example 10.4 A bipolar differential pair employs a load resistance of 1 k and a tail current of 1 mA. How close to can be chosen? Solution Equation 10.16 gives (10.17) (10.18) That is, must remain below by at least 0.5 V. Exercise What value of allows the input CM level to approach is the transistors can tolerate a base-collector forward bias of 400 mV? Now, let us vary in Fig. 10.7 by a small amount and determine the circuit’s response. In- terestingly, Eqs. (10.13)-(10.15) remain unchanged, thereby suggesting that neither the collector current nor the collector voltage of the transistors is affected. We say the circuit does not respond to changes in the input common-mode level; or the circuit “rejects” input CM variations. Figure 10.8 summarizes these results. The “common-mode rejection” capability of the differential pair distinctly sets it apart from our original circuit in Fig. 10.4(b). In the latter, if the base voltage of and changes, so do their collector currents and voltages (why?). The reader may recognize that it is the tail current source in the differential pair that guarantees constant collector currents and hence rejection of the input CM level.

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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 473 (1) Sec. 10.2 Bipolar Differential Pair 473 V V X V Y V CM1 V CM2 Upper Limit of to Avoid Saturation V CM R C I EE 2 CC , Figure 10.8 Effect of and at output. With our treatment of the common-mode response, we now turn to the more interesting case of differential response. We hold one input constant, vary the other, and examine the currents flowing in the two transistors. While not exactly differential, such input signals provide a simple, intuitive starting point. Recall that . Consider the circuit shown in Fig. 10.9(a), where the two transistors are drawn with a vertical offset to emphasize that senses a more positive base voltage. Since the difference between the base voltages of and is so large, we postulate that “hogs” all of the tail current, thereby turning off. That is, Q Q 1 2 V I EE X Y V in1 V in2 CC out V P = 2.5 V = +2 V = +1 V R R C C Q Q 1 2 V I EE X Y V in1 V in2 CC out V P = 2.5 V R R C C = +2 V = +1 V (a) (b) Figure 10.9 Response of bipolar differential pair to (a) large positive input difference and (b) large nega- tive input difference. (10.19) (10.20) and hence (10.21) (10.22) But, how can we prove that indeed absorbs all of ? Let us assume that it is not so; i.e., and . If carries an appreciable current, then its base-emitter voltage must reach a typical value of, say, 0.8 V. With its base held at V, the device therefore requires an emitter voltage of V. However, this means that sustains a base-emitter voltage of V!! Since with V, a typical transistor carries an enormous current, and since cannot exceed , we conclude that the conditions V and V cannot occur. In fact, with a typical base-emitter voltage of 0.8 V, holds node at approximately V, ensuring that remains off.
BR Wiley/Razavi/

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