16 4 1 1 The Effects of the s L and the d C on the Waveforms and the THD As Fig

# 16 4 1 1 the effects of the s l and the d c on the

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16-4-1-1 The Effects of the s L and the d C on the Waveforms and the THD As Fig. 16-9 shows, power is drawn from the utility supply by means of a pulse of current every half-cycle. The larger the “base” of this pulse during which the current flows, the lower its peak value and the lower the total harmonic distortion. This pulse-widening can be accomplished by increasing the ac-side inductance s L , as shown in Fig. 16-10a, by carrying out a parametric analysis using a t 3 t 2 t 1 v d ( ) dr s i i = i dr v s ω t 0 i s i s Figure 16-9 Current and voltage waveforms for the full bridge diode rectifier. 1 1 / 2 t T +
16-15 computer program such as PSpice™ (see Reference [2]). For the same power transfer, waveforms are shown for five values of s L . Increasing s L decreases the THD ; however, it also decreases the average dc-output voltage, as shown in Fig. 16-10b. Another parameter under the designer’s control is the value of the dc-bus capacitor d C . At its minimum, it should be able to carry the ripple current (in dr i and in the current drawn by the switch-mode converters discussed in Chapter 4) and keep the peak-to-peak ripple in the dc-bus voltage to some acceptable value, for example less than 5 percent of the dc-bus average value. Assuming that these constraints are met, the effect of d C is shown by means of parametric analysis in Figs. 16-11a and 16-11b, which show that the lower the value of d C , the lower the THD and the higher the ripple in the dc-bus voltage, respectively. In practice, it is almost impossible to meet the harmonic limits specified by the IEEE-519 by using the above techniques. Rather, the remedial techniques that will be described in section 16-5 are needed to meet the harmonic specifications. Ti me 300ms 310ms 320ms 330ms I ( Rs ) - 40A 0A 40A decreasing d C Figure 16-11 Variation in C d (a) input current; (b) output voltage. (a) (b) Ti me 300ms 310ms 320ms 330ms V( p, n) 100V 150V 200V 250V decreasing d C (a) Figure 16-10 Effect of variation in L S (a) input current distortion; (b) the output voltage. Ti me 70ms 80ms 90ms 100ms I ( Rs ) - 20A 0A 20A increasing s L Ti me 85ms 90ms 95ms 100ms v( p, n) 125V 150V 175V 200V increasing s L (b)
16-16 16-4-2 Three-Phase Diode-Rectifier Bridge It is preferable to use a three-phase utility source, except at a fractional kilowatt, if such a supply is available. A commonly-used full-bridge rectifier circuit is shown in Fig. 16-12a. To understand the circuit operation, the rectifier circuit can be drawn as in Fig. 16-12b. The circuit consists of a top group and a bottom group of diodes. Initially, the effects of s L and d C can be ignored. At least one diode from each group must conduct for the input current to flow. In the top group, all diodes have their cathodes connected together. Therefore, the diode connected to the most positive voltage will conduct; the other two will be reverse biased. In the bottom group, all diodes have their anodes connected together. Therefore, the diode connected to the most negative voltage will conduct; the other two will be reverse biased.

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