ece4305_L04

# Sampling theory revisited sampling theory revisited

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Sampling Theory Revisited Sampling Theory Revisited USRP Data Flow Frequency Domain Representation of Sampling - N N - S -2 S -3 S S 2 S 3 S S 2 S 3 S - S -2 S -3 S Xc( jΩ ) Xs( jΩ ) Xs( jΩ ) Ωs >2 N Ωs <2 N Figure: Signal Spectra (Top: Original, Middle: Sampled Without Aliasing, Bottom: Sampled With Aliasing). Professor Alexander M. Wyglinski ECE4305: Software-Defined Radio Systems and Analysis

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Sampling Theory Revisited Sampling Theory Revisited USRP Data Flow Nyquist Sampling Theorem I Let x c ( t ) be a bandlimited signal with I X s ( j Ω) = 0 for | Ω | ≥ Ω N I Then x c ( t ) is uniquely determined by its samples x [ n ] = x c ( nT ) if Ω s = 2 π T = 2 π f s N I Ω N is generally known as the Nyquist Frequency I The minimum sampling rate that must be exceeded is known as the Nyquist Rate Professor Alexander M. Wyglinski ECE4305: Software-Defined Radio Systems and Analysis
Sampling Theory Revisited Sampling Theory Revisited USRP Data Flow USRP receive and transmit paths J6666 J669 J667 J668 ADC 0 ADC 1 ADC 2 ADC 3 DAC 0 DAC 1 DAC 2 DAC 3 DUC DUC 4 HBF 4 HBF ↑N CIC ↑N CIC DDC 0 / ↓M S DDC 1 / ↓M DDC 2 / ↓M DDC 3 / ↓M MUX DEMUX USB Interface Chip S I Q I I I I I I I I I I I I I I I I Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Data Interleave Data De-Interleave Rx FIFO Tx FIFO I Vin_A1 Vin_A2 Vin_B1 Vin_B2 ADC/DAC Chip FPGA Chip Figure: Schematic of Sampling on USRP2 Platform. Professor Alexander M. Wyglinski ECE4305: Software-Defined Radio Systems and Analysis

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Sampling Theory Revisited Sampling Theory Revisited USRP Data Flow USRP Receive Path I Main components on Rx path I Four analog-to-digital converter (ADC) I Four digital down converter (DDC) I Signal processing on Rx path I IF band ADC DDC USRP board Baseband I/Q Professor Alexander M. Wyglinski ECE4305: Software-Defined Radio Systems and Analysis
Sampling Theory Revisited Sampling Theory Revisited USRP Data Flow DDC on Receive Path Decimating Low Pass Filter NCO Sine / Cosine Generator Center Frequency -fs/2 to +fs/2 Sampling Rate = fs Bandwidth Decimation Factor = N Input from ADC Input from ADC fs/N

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