The information received over fibre channel is

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The information received over Fibre Channel is collected 10 bits at a time. The transmission characters that are used for data (called data characters) are then decoded into the correct 8-bit code. When the receiver accepts those bits, it converts them into 10-bit codes using deserialization. Synchronization of bytes and words is accomplished by detecting the K28.5 character. This character contains the comma 7-bit string (x ’001 1111’ or b ‘110 0000’). Because these bits are only allowed at the beginning of the K28.5 character, which only exists in ordered sets, a receiver can easily synchronize words and bytes by searching for this string.
Accelerated SAN Essentials 2 -44 © 2010 Hewlett-Packard Development Company, L.P. UC434S F.00 The FC-1 coding layer is also used in PCI Express, IEEE 1394b, Serial ATA, SSA, Gigabit Ethernet and InfiniBand.
Fibre Channel Basics UC434S F.00 © 2010 Hewlett-Packard Development Company, L.P. 2 -45 FC-1 Coding layer FC-1 Coding layer Defines the 8-bit/10-bit encoding and decoding scheme State machines Each receiver contains a small “state machine” that implements synchronization procedures. The states are: Reset state –– No attempt is being made to acquire or synchronize data Loss-of-synchronization –– The receiver is attempting to acquire and synchronize data Synchronization acquired –– Data is being acquired and passed to higher levels for interpretation Five sub-states indicate that invalid transmissions are being received: No First Second Third Fourth Each error causes the state to shift to a lower-numbered sub-state.
Accelerated SAN Essentials 2 -46 © 2010 Hewlett-Packard Development Company, L.P. UC434S F.00 Because the loss-of-synchronization state is a critical error, these sub-states ensure that a single transmission error does not cause a reversal to the loss-of-synchronization state.
Fibre Channel Basics UC434S F.00 © 2010 Hewlett-Packard Development Company, L.P. 2 -47 FC-1 encoding process +/- FC-1 encoding process 3b/4b encoding switch 5b/6b encoding switch disparity control parallel input data from buffer (8b) encoded data to serialization engine (10b) 1 0 1 0 1 1 1 0 1 1 1 1 0 0 0 0 1 1 Data is encoded using an algorithm that creates one of two possible 10-bit output values for each input 8-bit value. Each 8-bit input value can map either to a 10-bit output value with odd disparity, or to one with even disparity. This mapping is usually done at the time when parallel input data is converted into a serial output stream for transmission over a fibre channel link. The odd/even selection is done in such a way that a long-term zero disparity between ones and zeroes is maintained. This is often called "DC balancing". The 8-bit to 10-bit conversion scheme uses only 512 of the possible 1024 output values. Of the remaining 512 unused output values, most contain either too many ones or too many zeroes so are not allowed. However this still leaves enough spare 10-bit odd+even coding pairs to allow for 12 special non-data characters.

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