The default is 1 Table 3 7 routeeco Command Options Continued Command option

The default is 1 table 3 7 routeeco command options

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The default is 1. Table 3-7 route_eco Command Options (Continued) Command option Description
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Chapter 3: Routing Clock and Signal Nets Verifying the Routed Design 3-36 IC Compiler™ Classic Router User Guide J-2014.09 IC Compiler™ Classic Router User Guide Version J-2014.09 Verifying the Routed Design After you have completed routing with the classic router, you can check the design for routing design rule violations. Note: The classic router uses center lines to determine connectivity. If your design contains wires with zero wire extension, the verify_route command might report open and spacing violations due to these zero extension wires. To fix this problem, use the convert_wire_ends command to convert all wires with zero extension into wires with half-width extensions. If the convert_wire_ends command cannot convert a wire, it issues a warning message and removes the wire from the design cell. Because the convert_wire_ends command modifies the wire end information and, in some cases, removes wires, write commands such as write_def generate output files that are different from the original input files. For more information about the convert_wire_ends commands, see the man page. The IC Compiler tool provides the following methods for verifying the routed design: Use the IC Validator tool to check the routing design rules defined in the foundry runset. To use this method, run the signoff_drc command or choose Verification > Signoff DRC in the GUI. Note: An IC Validator license is required to run the signoff_drc command. Use the IC Compiler DRC engine to check the routing design rules defined in the Milkyway technology file. To use this method, run the verify_route command or choose Route > Verify Route in the GUI. Import the DRC results from the Calibre tool. The following sections describe these methods. Using the signoff_drc Command Signoff design rule checking runs the IC Validator tool within the IC Compiler tool to check the routing design rules defined in the foundry runset. To perform signoff design rule checking, run the signoff_drc command (or choose Verification > Signoff DRC in the GUI). Note: An IC Validator license is required to run the signoff_drc command.
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Chapter 3: Routing Clock and Signal Nets Verifying the Routed Design 3-37 IC Compiler™ Classic Router User Guide Version J-2014.09 To use the signoff_drc command to perform design rule checking, Set up the validation tool environment. Set up the physical signoff options. Run the signoff_drc command (or choose Verification > Signoff DRC in the GUI). The following sections describe these tasks. Setting Up the IC Validator Environment To run the signoff_drc command, you must specify the location of the IC Validator executable by setting the ICV_HOME_DIR environment variable. You can set this variable in your .cshrc file. To specify the location of the IC Validator executable, use commands similar to those shown in the following example: setenv ICV_HOME_DIR /root_dir/icv set path = ($path $ICV_HOME_DIR/bin/AMD.64)
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