Fakulti Sains Komputer dan Technology Maklumat (FSKTM), UTHMCondition CodeBIT20303-Computer Architecture17
How big register are needed?BIT20303-Computer Architecture18
Fakulti Sains Komputer dan Technology Maklumat (FSKTM), UTHMControl & Status RegistersFour registers are essential to instruction execution:Program counter (PC): Contains the address of an instruction to be fetchedInstruction register (IR): Contains the instruction most recently fetchedMemory address register (MAR): Contains the address of a location in memoryMemory buffer register (MBR): Contains a word of data to be written to memory or the word most recently readBIT20303-Computer Architecture19
Fakulti Sains Komputer dan Technology Maklumat (FSKTM), UTHMControl & Status RegistersHow they operate with each other : The processor updates the PCafter each instruction fetch so that the PCalways points to the next instruction to be executed. Skip instruction will also modify the contents of the PC.The fetched instruction is loaded into an IR, where the opcode and operand specifiers are analyzed.Data are exchanged with memory using the MARand MBR. In a bus-organized system, the MARconnects directly to the address bus, and the MBRconnects directly to the data bus. BIT20303-Computer Architecture20
Fakulti Sains Komputer dan Technology Maklumat (FSKTM), UTHMProgram Status WordMany processor designs include a register or set of registers, often known as the Program Status Word (PSW), that contain status information.The PSW typically contains condition codes plus other status information. Common fields or flags include the following:BIT20303-Computer Architecture21SignZeroCarryEqualOverflowInterrupt enable/disableSupervisor
Fakulti Sains Komputer dan Technology Maklumat (FSKTM), UTHMProgram Status WordSign: Contains the sign bit of the result of the last arithmetic operation.Zero: Set when the result is 0.Carry: Set if an operation resulted in a carry (addition) into or borrow (subtraction) out of a high-order bit. Used for multiword arithmetic operations.Equal: Set if a logical compare result is equality.BIT20303-Computer Architecture22
Fakulti Sains Komputer dan Technology Maklumat (FSKTM), UTHMProgram Status WordEqual: Set if a logical compare result is equality.Overflow: Used to indicate arithmetic overflow.Interrupt Enable/Disable: Used to enable or disable interrupts.Supervisor: Indicates whether the processor is executing in supervisor or user mode. Certain privileged instructions can be executed only in supervisor mode, and certain areas of memory can be accessed only in supervisor mode.