Fundamentals-of-Microelectronics-Behzad-Razavi.pdf

B now suppose the output quantity of interest is

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(b) Now, suppose the output quantity of interest is . Assuming is very large, compute the closed-loop gain and I/O impedances of the circuit. 41. The common-gate stage shown in Fig. 12.102 employs an ideal current source as its load,
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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 677 (1) Sec. 12.9 Chapter Summary 677 in V R R V out M 1 V DD 1 2 Figure 12.102 requiring that the loading introduced by and be taken into account. Repeat Example 12.26 for this circuit. 42. Figure 12.103 depicts the bipolar counterpart of the circuit studied in Example 12.26. Assum- in V R R V out R V 1 2 Q 1 C CC Figure 12.103 ing is not very large, and , determine the closed-loop gain and I/O impedances. 43. Repeat Problem 42 for the amplifier illustrated in Fig. 12.104. R R V out V 1 2 Q 1 CC in V Figure 12.104 44. Repeat Example 12.28 for the circuit shown in Fig. 12.105. Assume . M 1 V DD R M 2 D1 out R R in 1 2 V V Figure 12.105
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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 678 (1) 678 Chap. 12 Feedback 45. Repeat Example 12.28 for the circuit shown in Fig. 12.106. Assume . V DD R D1 out R R in 1 2 V V Q 2 Q 1 R P Figure 12.106 46. Assuming , determine the closed-loop gain and I/O impedances of the amplifier depicted in Fig. 12.107. (For open-loop calculations, it is helpful to view and as a Q 2 Q 1 R R V out 1 2 V CC in V Figure 12.107 follower and a common-base stage, respectively.) 47. Repeat Example 12.29 for the circuit illustrated in Fig. 12.108. Assume . V DD M V 1 M 2 R D1 b in i R F out v R R 1 2 Figure 12.108 48. Repeat Example 12.29 for the bipolar transimpedance amplifier shown in Fig. 12.109. Assume . 49. Figure 12.110 depicts a popular transimpedance amplifier topology. Repeat the analysis of Example 12.29 for this circuit. Assume . 50. The circuit of Fig. 12.110 can be improved by inserting an emitter follower at the output (Fig. 12.111). Assuming , repeat Example 12.29 for this topology. 51. Determine the closed-loop gain and I/O impedances of the circuits shown in Fig. 12.112, including the loading effects of each feedback network. Assume .
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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 679 (1) Sec. 12.9 Chapter Summary 679 Q V CC Q V b R F out V 1 2 I in R R 1 2 Figure 12.109 Q 1 R R V C F I in out V CC Figure 12.110 Q 1 V I in out V CC Q R F 2 R C Figure 12.111 52. The circuit of Fig. 12.97, repeated in Fig. 12.113, employs a value for that is not very small. Assuming and the diode exhibits an impedance of , repeat the analysis of Example 12.30 for this circuit. 53. Repeat Example 12.32 for the circuit shown in Fig. 12.114. Note that is replaced with a current source but the analysis proceeds in a similar manner. 54. Repeat Problem 53 for the circuit illustrated in Fig. 12.115. Assume . 55. Repeat Problem 53 for the topology depicted in Fig. 12.116. Assume . 56. Compute the closed-loop gain and I/O impedances of the stages illustrated in Fig. 12.117. 57. Construct the Bode plots for the magnitude and phase of the following systems: (a) , , .
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