HARDWARE DESIGN TECHNIQUES
SECTION 10
HARDWARE DESIGN TECHNIQUES
I
Low Voltage Interfaces
I
Grounding in Mixed Signal Systems
I
Digital Isolation Techniques
I
Power Supply Noise Reduction and Filtering
I
Dealing with High Speed Logic
10.a
HARDWARE DESIGN
DSP APPLICATIONS
SECTION 9
DSP APPLICATIONS
I
High Performance Modems for Plain Old Telephone
Service (POTS)
I
Remote Access Server (RAS) Modems
I
ADSL (Assymetric Digital Subscriber Line)
I
Digital Cellular Telephones
I
GSM Handset Using SoftFone Baseban
INTERFACING TO DSPS
SECTION 8
INTERFACING TO DSPs
I
Parallel Interfacing to DSP Processors: Reading Data
From Memory-Mapped Peripheral ADCs
I
Parallel Interfacing to DSP Processors: Writing Data to
Memory-Mapped DACs
I
Serial Interfacing to DSP Processors
DSP HARDWARE
SECTION 7
DSP HARDWARE
I
Microcontrollers, Microprocessors, and Digital Signal
Processors (DSPs)
I
DSP Requirements
I
ADSP-21xx 16-Bit Fixed-Point DSP Core
I
Fixed-Point Versus Floating Point
I
ADI SHARC Floating Point DSPs
I
ADSP-2116x Singl
DIGITAL FILTERS
SECTION 6
DIGITAL FILTERS
I
Finite Impulse Response (FIR) Filters
I
Infinite Impulse Response (IIR) Filters
I
Multirate Filters
I
Adaptive Filters
6.a
DIGITAL FILTERS
6.b
DIGITAL FILTERS
SECTION 6
DIGITAL FILTERS
Walt Kester
INTRODUCTION
D
FAST FOURIER TRANSFORMS
SECTION 5
FAST FOURIER TRANSFORMS
I
The Discrete Fourier Transform
I
The Fast Fourier Transform
I
FFT Hardware Implementation and Benchmarks
I
DSP Requirements for Real Time FFT Applications
I
Spectral Leakage and Windowing
5.a
FAS
DACS FOR DSP APPLICATIONS
SECTION 4
DACs FOR DSP APPLICATIONS
I
DAC Structures
I
Low Distortion DAC Architectures
I
DAC Logic
I
Sigma-Delta DACs
I
Direct Digital Synthesis (DDS)
4.a
DACS FOR DSP APPLICATIONS
4.b
DACS FOR DSP APPLICATIONS
SECTION 4
DACs FO
ADCS FOR DSP APPLICATIONS
SECTION 3
ADCs FOR DSP APPLICATIONS
I
Successive Approximation ADCs
I
Sigma-Delta ADCs
I
Flash Converters
I
Subranging (Pipelined) ADCs
I
Bit-Per-Stage (Serial, or Ripple) ADCs
3.a
ADCS FOR DSP APPLICATIONS
3.b
ADCS FOR DSP APPLI
SAMPLED DATA SYSTEMS
SECTION 2
SAMPLED DATA SYSTEMS
I
Discrete Time Sampling of Analog Signals
I
ADC and DAC Static Transfer Functions and DC Errors
I
AC Errors in Data Converters
I
DAC Dynamic Performance
2.a
SAMPLED DATA SYSTEMS
2.b
SAMPLED DATA SYSTEMS
INTRODUCTION
SECTION 1
INTRODUCTION
1.a
INTRODUCTION
1.b
INTRODUCTION
SECTION 1
INTRODUCTION
Walt Kester
ORIGINS OF REAL-WORLD SIGNALS AND THEIR UNITS
OF MEASUREMENT
In this book, we will primarily be dealing with the processing of real-world signals
usin
INDEX
INDEX
I
SUBJECT INDEX
I
ANALOG DEVICES PARTS INDEX
Index-a
INDEX
Index-b
INDEX
Subject Index
A
AA Alkaline Battery Discharge
Characteristics, 10.14
Absolute value amplifier, 3.29
Active and Passive Electrical Wave Catalog,
2.42
AD185x, multibit sigm
Homework #4
Due , 14:00 p.m., Nov. 24, 2009
1. Using the circuits developed in HW#1-#3, please design a frequency synthesizer
with input frequency 1MHz and the output frequencies from 2.4GHz-2.48GHz with a
step of 1MHz. The locked time with a step of 1MHz
Homework #3 Due 14:00p.m., Nov. 3, 2009
1. Design a dual-modulus prescaler divide-by of 128/129. Suppose that the input
frequency is 2.4GHz.
(a) Using a 0.18um virtual process and HSPICE, simulate and verify your design.
2. Design an LC VCO with a tunable
Homework #2 Due 14:00 p.m., on Oct. 13, 2009
1. Design a static phase-frequency detector (PFD) [1] with a simple charge pump to
achieve the deadzone less 1ps. Suppose that the input frequency is 200MHz and the
output filter is a capacitor of 1nF.
(a) Usin
Homework #1 Due before 14:00 p.m. on Sept. 29, 2009,
Two problems:
1. Suppose that a phase locked loop consists of a phase detector with a current pump
circuit, I p mA, a VCO of K V , MHz/V, a passive loop (a resistor,R, in series of a
capacitor, C) and a