2. (30 points) Short Q&A. Please keep your answer to each question within three
sentences.
(1) The 8bit twos complement number for 4ten is 1111 1100. What is the result if
we sign-extend it to a 16-bit twos complement number? You don t have to
explain you
Stalls and flushes
CS250
Computer Architecture
Stalls and Flushes
Last time, we discussed data hazards that can occur in pipelined CPUs if
some instructions depend upon others that are still executing.
Many hazards can be resolved by forwarding data fro
3/29/16
Forwarding
CS250
Computer Architecture
Data Hazards and
Forwarding
Previously, we introduced a pipelined MIPS processor which executes
several instructions simultaneously.
Each instruction requires five stages, and five cycles, to complete.
E
CS 250: Computer Architecture
Final Exam Sample Problems
1. (10 questions) True or False? Indicate by entering a T (if true) or F (if false) in
the appropriate brackets before each question (grading: +2 for each correct
answer, 0 for incorrect or no answe
CS 250: Computer Architecture
Final Exam Sample Problems
1. (10 questions) True or False? Indicate by entering a ‘T’ (if true) or ‘F’ (if false) in
the appropriate brackets before each question (grading: +2 for each correct
answer, 0 for incorrect or no a
Review Ques*ons for Final
CS 250
Ques*on on DL
To the right of the following gate draw an
equivalent gate or collection of gates that
does not contain a NAND gate nor an AND
gate.
What circuit is this?
Fill the table
Number
6
-10
12/15/15
Review Ques.ons for Final
CS 250
Ques.on on DL
To the right of the following gate draw an
equivalent gate or collection of gates that
does not contain a NAND gate nor an AND
gate.
Solu%on: Use Demorgans laws.
(A.B) = A + B
1/12/16
CS 250 Computer Architecture
Introduc9on
Prof. Umesh Bellur
Purdue University
1
EMERGENCY PREPAREDNESS A MESSAGE FROM PURDUE
To report an emergency, call 911. To obtain updates regarding an ongoing
emergency, sign up for Pur
Introduction to Karnaugh Maps
Review
Consider the truth table for a basic 2-input multiplexer. We can view the
truth table as a sort of specification that says what a circuit should do.
S
A
B
Y
0
0
0
0
0
0
1
0
0
1
0
1
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
0
1
1
1
CS 250, Fall 2015, Assignment # 1 for Bonus points,
Due on Oct 9th 4.30 pm in class
1
Number Systems
These questions are for 3 points each.
1. Convert the decimal number -67 to 8-bit, signed 2s complement binary.
Solution:
First we need to convert 67 to b
3. (20 points) Combinatorial digital circuit A 1bit comparator takes two 1bit inputs.
If the two bits are equal, the output is 1; otherwise the output is 0.
(l) (6 points) Show the truth table of a 1-bit comparator and illustrate how to implement
the 1-bi
C8250 Computer Architecture Quiz 4 (25 minutes)
Attention: Dont forget the problem on the reverse side!
Name (5 points): 5 0 1.1790 J Emall: C/X (it @Cgmtue/eeac
1. (10 points) Multiple choices Select one (and only one) correct answer.
(1) To implement a
CS 250
Fall 2015
Quiz 2
10/09/15
Time Limit: 30 Minutes
Purdue ID (PRINT CLEARLY):
This exam contains 6 pages (including this cover page) and 7 problems. Check to see if any pages
are missing. Enter all requested information on the top of this page, and p
cs 250. Full 22115 Quiz 1 . Page 2 u-f 5 Him!
1. (5 points Assume a circuit has a spare NOR gate. Can any SEEM hummus be created by
connecting one of the inputs to logical one? To logical zero? Explain.
" (D I A to :L MM A mg
% AFLB 225%. Mm . E W UW
: 0
1/25/16
CS 250 Computer Architecture
Week 3 - Data and Program
RepresentaAon
Prof. Umesh Bellur
Why do we need to know this?
So far:
Digital Logic and circuits that implement digital logic
Digital Logic is
1/25/16
CS 250 Computer Architecture
Week 3: Measuring and Repor@ng
Performance
Prof. Umesh Bellur
Dierent Perspec@ves
The User perspec@ve
How fast is it?
How much does it cost in terms of money?
The Design
11/12/15
Datapath & Pipelining Study
Ques8ons
CS 250
Ques8on 1
0
M
u
x
Add
PC
4
Add
Shift
left 2
1
PCSrc
RegWrite
Read Instruction
address
[31-0]
MemWrite
I [25 - 21]
Read
register 1
I [20 - 16]
Instruction
memory
0
M
u
I [15 - 11] x
1
Read