Spring 2013
ECE 579C
Thomas Eisenbarth
Project # 4
This project is due Thursday, March 19.
1. Information from Side Channels
Let X be a random variable on the discrete space X = cfw_0, 1, . . . , 255 with a
uniformly distributed probability distribution.
Project 3 Implementing Square Root Function on an FPGA
Project Description:
In many signal processing algorithms, it often requires square root (SQRT) operations. There are two
general approaches to implement SQRT on an FPGA. One is to use the CORDIC algo
Project 4 Design a Direct Digital Synthesizer for WCDMA Transceiver
Project Description:
This project is to design a direct digital synthesizer (DDS) for WCDMA up conversion and down
conversion. The basic architecture of a DDS is shown in Figure 1 below:
Project 5 Viterbi Decoder
Project Description:
This project is to design a Viterbi decoder. The basic architecture of the encoder is shown in Figure 1.
This code is widely referred as K=3(7,5) structure, in which constraint length is 3 and the generator
p
Project 6 Design an Adaptive Median Filter for Image Noise Reduction
Project Description:
This project is to design a simple adaptive median filter that can reduce the impulse noise on an image.
The main emphasis of this project is to get familiar with re
Design an Adaptive Median Filter for Image
Noise Reduction
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Abstract in this design we will design a simple adaptive median filter that can reduce the
impulse noise on an ima
Viterbi Decoder
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Abstract in this design we will build a Viterbi decoder with traceback depth of 16, which is
greater than 5 times of constraint length. This code is widely r
Design a Direct Digital Synthesizer for
WCDMA Transceiver
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Abstract in this project we will design a direct digital synthesizer (DDS) for WCDMA up
conversion and down convers
Implementing Square Root Function on an
FPGA
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Abstract in many signal processing algorithms, it often requires square root (SQRT) operations.
In this design, we will use Newt
Active Filters
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
AbstractThe Fast Fourier Transform (FFT) as the time domain and frequency domain
transformation of the basic operations is a necessary prerequisite for digita
Multirate Filter Design on FPGA
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Abstract the goal of the project is to design a sampling rate conversion system on an FPGA.
The original audio signal was sampled at 48 KHz.
Spring 2013
ECE 579C
Thomas Eisenbarth
Project # 2
This project is due Thursday, February 19.
1. Efficient Modular Exponentiation
Implement different versions of the modular exponentiation my pow(x,e,n)
such that the returned value y is y = xe mod n. Comp
Project 1 Multirate Filter Design on FPGA
Project Description:
This project is to design a sampling rate conversion system on an FPGA. The original audio signal was
sampled at 48 KHz. For advanced information retrieval, the signal needs to be resampled at