EE 101 Homework 2
Redekopp Name: _Solutions_ Due: Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work. 1.a F = (A+B)(C) ABC A B A + B 00
EE 101 Midterm
Fall '07 Redekopp Name: _Solutions_ Lecture 9:30 / 12:30 / 2:00 Closed Book / 90 minutes Score: _ No calculators are allowed. Show all your work to get full credit. 1. Number Systems a. Perform the indicated conversions: (B7)16 = (?)8
EE 101 Sample Midterm
Redekopp Name:_ Score: / 100 1. Short Answer a. What range of numbers can be represented with a 6-bit 2's complement system? -2n-1 to +2n-1-1 = -32 to +31 b. What determines the speed of a digital circuit as discussed in class?
8.3. Unit 3 Decoders, Encoder, Multiplexers, Demultiplexers, Adders and Comparators
1. a. F =
A , B ,C
( 2,4,6,7) =
/Y0 /Y1
A , B ,C
(0,1,3,5)
m0'
C B A 1 0
A0
/Y2
m2' m4'
m1' m3' m5'
F
A1 A2 G1 /G2
3-to-8 Decoder
/Y3 /Y4 /Y5 /Y6 /Y
8.2. Unit 2 - Boolean Algebra, Logic Functions, and Canonical Representation, 2-Level Implementations and Circuit Design w/ Karnaugh Maps
1. Probably the easiest method is perfect induction (i.e. a truth table) F = X + X' = 1 X X' F 0 1 1 1 0 1 2. a.
8.6. Unit 6 Datapath Design
1. Implement a circuit that takes in a 4-bit number X[3:0] and produces a 4-bit value Z[3:0] according to the following function: if X < 8 then Z = X + 10; else if X = 8 then Z = X 3; else Z = X 2; Using the building bl
8. Appendix B: Sample Problem Solutions
The following are solutions to the problems presented in Appendix A. Use these only after attempting the problems on your own.
293
8.1. Unit 1 - Number Systems, Conversions, Signed Representations and Arithme
EE 101 Lab 3 Logic Design w/ Karnaugh Maps
1 Introduction
In this lab you will implement a 3-bit incrementer circuit (i.e. it adds 1 to the input number) using Karnaugh maps to find the simplest implementation. Your circuit will take a 3-bit, unsigned num
EE 101 Homework 3
Fall 09 Redekopp Name: _
Due: Tues. Sept. 29th in class Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple th em together. Only use a calculator to CHECK your work, not to DO your work.
Lecture
EE 101 Homework 5
Spring 12
Nazarian
Score:_/140
Student ID: _
Name: _
Assigned: Tuesday, March 27, 2012
rd
Due: Tuesday, April 10 at 6:30pm EEB. (EE101 HW locker on EEBs 3 flr.)
Due to Quiz II, no late submissions after 9pm will be accepted. Late submiss
EE 101 HW2 & HW3 Combined
Spring 12
Nazarian
Score:_/210
Student ID: _
Name: _
Assigned: Sunday, February 5
rd
Due: Wednesday, February 22 at 6pm (EE101 HW locker on EEBs 3 flr.)
Late submissions between 5:30&6:30pm: 2% reduction, between 6:30&7:30pm: 6%,
EE 101 Homework 2
Fall 09 Redekopp Name: _
Due: Tues. Sept. 15th in class Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple th em together. Only use a calculator to CHECK your work, not to DO your work.
Lecture
EE 101 Homework 5
Fall 12 Redekopp
Name: _
Lecture 8:30 / 12:30 / 2:00
Due: Tues. Oct. 23rd in class
Score: _
For Blackboard based questions, enter your answers in the submission form.
For Xilinx based questions, download the corresponding Xilinx project
EE 101 Homework 5
Redekopp Name: _Solutions_
Due: Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work.
1) (36 pts.) Design (create
EE 101 Lab 7 Crosswalk
1 Introduction
In this lab you will complete the control unit and datapath for a simple crosswalk
controller that was discussed in class. You should work on this lab INDIVIDUALLY!
2 What you will learn
This lab is intended to teach
EE 101 Homework 5
Redekopp Name: _Solutions_
Due: Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work.
1. (32 pts.) Perform the followin
EE 101 Homework 7
Fall 12 Redekopp
Name: _
Lecture 9:30 / 12:30 / 2:00
Due: Thurs. Nov. 15th in class
Score: _
Blackboard ONLY Submission with companion Xilinx Project to verify your design.
While the Blackboard submission may not require you to go throug
EE 101 Lab 4 CAD Tool Introduction
1 Introduction
In this lab you will be given a design that is intended to implement a 3-bit
decrementer circuit that does not function correctly. You will need to complete the
schematic, simulate the design to determine
EE 101 Lab 3 Logic Design w/ Karnaugh Maps
1 Introduction
In this lab you will implement a 3-bit incrementer circuit (i.e. it adds 1 to the input
number) using Karnaugh maps to find the simplest implementation. Your circuit
will take a 3-bit, unsigned num
EE 101 Lab 1 Sound the Alarm
1 Introduction
In this lab you will design, implement and then test a simple logic circuit emulating
a home alarm system. You will use the Digital Trainer board for this lab and may
work in teams of two, turning in one answer
EE 101 Homework 8
Fall 11 Redekopp
Name: _
Lecture 9:30 / 11:00 / 2:00
Due: Tues. Nov. 29th in class
Score: _
Show work to get full credit. Remember, use on only one side of the paper and staple th em together.
Only use a calculator to CHECK your work, no
EE 101 Homework 3
Redekopp Name: _Solutions_ Due: Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work. 1.a x = x NOR 0
x 0 x
or inversio
EE 101 Homework 8
Fall '08 Redekopp Name: _Solutions_ Score: _
Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work.
NOTE: PLEASE DRAW ALL DIAGRAM
EE 101 Homework 3
Fall 12 Redekopp
Name: _
Lecture 8:30 / 12:30 / 2:00
Due: Tues. Oct. 2nd before class
Score: _
Show work to get full credit. Remember, use on only one side of the paper and staple th em together.
Only use a calculator to CHECK your work,
EE 101 Homework 4
Redekopp
Name: _Solutions_
Due:
Score: _
Show work to get full credit. Remember, use on only one side of the paper and staple them together.
Only use a calculator to CHECK your work, not to DO your work.
1) Design (create one schematic d
EE 101 Homework 4
Fall 12 Redekopp
Name: _
Due: Thurs. Oct 11th in class
Lecture 9:30 / 12:30 / 2:00
Score: _
In this homework we will use Xilinx to complete the indicated designs.
Using Xilinx to perform this homework.
Please download the Xilinx EE 101 H
EE 101 Homework 5
Redekopp Name: _Solutions_
Due: Score: _ Show work to get full credit. Remember, use on only one side of the paper and staple them together. Only use a calculator to CHECK your work, not to DO your work.
1. (32 pts.) Perform the followin
EE 101 Homework 6
Redekopp Solutions: 1.a
X Q
Y
P
X 0 0 1 1 1.b
X
Y 0 1 0 1
Q* ? ? ? ?
Hold case if P = Q' Illegal / Not Stable if Q = P Illegal / Toggling Illegal / Toggling Hold case if P = Q Illegal / Not Stable if Q = P'
Q
Y
X = Set 0 0 1 1
Y = Reset
EE 101 Homework 6
Fall 12 Redekopp
Name: _
Due: Thurs. Nov 1st in class
Lecture 8:30 / 12:30 / 2:00
Score: _
1) [BB] (10 pts.) Examine the two circuits below and determine whether each is a valid
bistable element. Label each case in the truth table as eit