EELE 262 Logic Circuits Lab
Lab #1 Introduction to Lab Equipment
Objective
The objective of this lab is to become familiar with the basic test equipment in the laboratory that will be used to
take mea
EELE 262 Logic Circuits Lab
Lab #5 Combinational Logic (3-input & DeMorgans)
Objective
The objective of this lab is to continue with the implementation of combinational logic using discreet parts and
EELE 262 Logic Circuits Lab
Lab #4 Combinational Logic (2-input) + LED Driver
Objective
The objective of this lab is to begin implementing combinational logic circuits using discreet parts. In additio
EELE 262 Logic Circuits Lab
Lab #3 DC Operating Conditions Under Different Load Types
Objective
The objective of this lab is to become familiar with the DC behavior of 74LS logic gates when driving di
EELE 262 Logic Circuits Lab
Lab #2 Introduction to 74LS Logic Gates
Objective
The objective of this lab is to become familiar with the basic gates within the 74LS logic fam ily and understand the
diff
EELE 262 Logic Circuits Lab
Lab #6 Combinational Logic (4-input) & Fan-In
Objective
The objective of this lab is to continue with the implementation of combinational logic using discreet parts. In
add
EELE 262 Logic Circuits Lab
Lab #7 Combinational Logic Design with VHDL
(7-Segment Display Decoder)
Objective
The objective of this lab is to learn how to implement combinational logic using VHDL and
EELE 262 Logic Circuits Lab
Lab #11 Finite State Machines (VHDL)
Objective
The objective of this lab is to introduce the structural design of finite state machines using VHDL. This lab will
cover the
EELE 262 Logic Circuits Lab
Lab #10 Finite State Machines (Discrete)
Objective
The objective of this lab is to design and implement a finite state machine using discrete parts. Specifically, this lab
EELE 262 Logic Circuits Lab
Lab #9 Discrete Sequential Logic & Switch Debouncing
Objective
The objective of this lab is to introduce discrete sequential circuits. This lab will cover the design of a r
EELE 262 Logic Circuits Lab
Lab #8 Sequential Logic in VHDL
(Ripple Counter)
Objective
The objective of this lab is to introduce sequential logic in VHDL. This lab will cover the design of a simple bi