EE 308 Fall 2011
EE 231 Homework Chapter 2
2.6 Use the Venn diagram to prove that
1+ 2+ 3
1+ 2+ 3 = 1+ 2
2.8 Draw a timing diagram for circuit in Figure 2.19a. Show the waveforms that can be
observed on all wires in the circuit.
2.10 Use algebraic manipu
EE 308 Fall 2011
EE 231 Homework Chapter 3
3.3 (a) Show that the circuit in Figure P3.3 is functionally equivalent to the circuit in
Figure P3.2.
(b) How many transistors are needed to build this CMOS circuit if each XOR gate is
implemented using the circ
EE 231
Fall 2007
_
Homework #4 Due October 17, 2007
7.1 Consider the timing diagram in Figure P7.1. Assuming that the D and Clock inputs
shown are applied to the circuit in Figure 7.12, draw the waveforms for the Qa, Qb, Qc
signals.
Clock
D
Figure P7.1. T
EE 308 Fall 2011
EE 231 Homework Chapter 7
7.3 Figure 7.5 shows as latch build with NOR gates. Draw a similar latch using NAND
gates. Derive its characteristic table and show its timing diagram.
7.10 Write Verilog code that represents a T flip-flop with a
EE 308 Fall 2011
EE 231 Homework Chapter 6
6.1 Show how the function
,
=
a 3-to-8 binary decoder and an OR gate.
0,2,3,4,5,7 can be implemented using
6.6 For the function
,
=
0,4,6,7 use Shannons expansion to derive an
implementation using a 2-to-1 multip
EE 231
Fall 2007
_
Homework #5 Due November 19, 2007
4.10 Derive a minimum-cost realization of the four variable function that is equal to 1 if
exactly tow or exactly three of its variables are equal to 1; otherwise it is equal to 0.
4.21 Find the minimum
EE 308 Fall 2011
EE 231 Homework Chapter 5
5.4 Convert to decimal numbers 73, 1906, -95, and -1630 into signed 12-bit numbers in
the following representations:
(a) Sign and magnitude
(b) 1s complement
2s complement
5.5 Perform the following operations in
EE 308 Fall 2011
EE 231 Homework Chapter 4
4.10 Derive a minimum-cost realization of the four-variable function that is equal to 1 if
exactly two or exactly three of its variables are equal to 1; otherwise it is equal to 0.
4.12 A circuit with 2 outputs h
EE 231
Fall 2007
_
Homework #3 Due October 3, 2007
5.1 Determine the decimal values of the following unsigned numbers:
(a) (0111011110)2
(b) (1011100111)2
(c) (3751)8
(d) (A25F)16
(e) (F0F0)16
5.3 Determine the decimal values of the following 2s complemen
EE 231
Fall 2007
_
Homework #2 Due September 19, 2007
3.1 Consider the circuit shown in Fig. P3.1.
a) Show the truth table for the logic circuit f.
b) If each gate in the circuit is implemented as a CMOS gate, how many transistors are
needed?
x1
x2
f
x3
F