CSE220 Spring 2015
Practice Problems #10
Problem 1: Show the forwarding paths and stalls needed to execute the following instructions assuming
the beq is taken the rst time but not the second. Attempt the problem assuming the branch decision
is made in th
CSE220 Spring 2015
Practice Problems #9
Problem 1: Using the abstract pipelined datapath gure (as shown below, handout on piazza), show
the forwarding paths and stalls needed to execute the following instructions.
$2, $3, $
CS220 Spring 2015
Practice Problems #8
Problem 1: Assuming the following timings for the components of the datapath. All other components have no
Data/Instruction Memory Read: 200ps
Data Memory Write: 100ps
CSE320 Lecture 18-19
MIPS Multicycle Datapath
The single cycle implementation of the MIPS datapath was inefficient.
o Clock cycle time is dictated by the longest instruction. The rest of the instructions are wasting time
doing nothing but waiting for the
CSE220 Lecture 23
MIPS Pipelining Basics
What we have seen so far is a very simplified approach to the execution of MIPS instructions.
We fetch an instruction, decode it, and execute it completely before starting another instruction.
Only one instruction
CSE220 Lecture 24
MIPS Pipelining Hazards
Hazards are situations, caused by the sequence of MIPS instructions or the hardware, that prevent or
complicate the execution of the next instruction in the pipeline.
There are 3 types of hazards:
o Structural haz
CSE220 Lecture 25
MIPS Pipelining Hazards - continued
Typical execution of instructions is one after another in memory. However, branch and jump instructions
allow for the linear execution to be modified.
During pipelining, the branch inst
Measure, Report, and Summarize
Make intelligent choices
See through the marketing hype
Key to understanding underlying organizational
Why is some hardware better than others for different programs?
What factors of system performance
CSE220 Lecture 21
MIPS Multicycle Datapath New Instructions
Modifications to the Multicycle datapath must be considered in stages.
Any new instructions should be broken into subtasks/sub-stages which are similar to the existing stages.
Whenever possible t
CSE220 Lec 8 & 9
MIPS Instruction Set Architecture & Datapath
We have studied various building blocks, such as the register file and the ALU.
Next we will examine how to connect these building blocks together to build a working
processor and how to contro
Microprocessor without Interlocked Pipeline Stages
Designed in early 1980s by John Hennessy
(SB Alum, now president of Stanford University).
Register machine (32 registers)
Has been used in many products:
Routers, cable and ADSL
CSE220 Lecture 20
Sequential Circuits & MIPS Multicycle Datapath Control
Mainly up until this point, we have discussed logic gates in combinatorial circuits. Combinatorial circuits
take stable input values and propagate their signals through logic gates t
CSE220 Lecture 22
MIPS Recursive Programming Examples
(Text originally from Charles Lin at UMD corrections made)
Let's solve the following recursive function, written in C. This sums all elements of an array.
int sum( int arr, int size ) cfw_
Branching, & Control Structures in MIPS
Branch instructions allow for the changing of the flow of the program. Without them, the program will
continue in a straight line of execution.
Two types of branch instructions
o Conditional branches
Von Neumann Architecture
The term von Neumann architecture refers to a particular design
model for a stored-program digital computer.
Separate central processing unit (CPU) and random-access
Both instructions and data stored in RAM.
Converting Decimal Fractions to Binary
To obtain the binary digits corresponding to a decimal value less
Generate bits left-to-right, starting at radix point:
Multiply the decimal value by 2. If greater than 1, next
bit is 1, otherwise next bit
CSE220 Lecture 16
Function and Procedure Calls in MIPS
Functions allow for more structured programs, code reuse, and makes code easier to understand and
Function Call Steps
There are 6 steps to calling a function in MIPS.
CSE220 Lecture 10
Basic MIPS Datapath Adding Instructions
The basic datapath we have built only implements the instructions lw, sw, beq, R-type and jump. In order to
add the other instructions from the MIPS assembly instruction set additional hardware wou
CSE320 Lecture 6
Adders & Arithmetic Logic Unit (ALU)
A major component of a processor.
Arithmetic part does addition and subtraction of two numbers.
Logical part calculates bitwise AND & OR of two values.
How does it subtract? Uses adder.
A B = A + 2s co
CSE220 Lecture 5
Demultiplexors, Decoders, Encoders, Adders
Inverse of a multiplexor.
It connects or routes its single input to one of 2n outputs depending on the value of the selector/control
If the binary value of the control bits is
CSE220 Lecture 4
Building Components & Multiplexors
Boolean Logic is the tool to build any hardware unit with a defined functionality.
Lets design a black box with a decimal digit (0-9) encoded in 4-bit binary as input (A3
Digital Logic: Karnough Maps
Karnaugh maps, k-maps for short, are a graphical way to minimize Boolean functions.
So what is a Karnaugh map?
A Karnaugh map provides a pictorial method of grouping together expressions with common f
CSE220 Lecture 2
Combinatorial Digital Logic (contd)
o The key to simplifying Boolean expressions is to learn the Identities.
(A')' = A
AA = A
A+A = A
A A' = 0
A + A' = 1
Null (or Dominance):
CSE320 Lecture 1
Combinatorial Digital Logic
Digital Logic is how all instructions and calculations are implemented.
o Underlying representation of storage, memory, calculations, etc.
o Study to understand how control logic, registers, actually function.
All data is ultimately represented in a computer in terms of bits
Each bit is either a 0 or a 1.
Groups of bits represent higher-level values.
1101 1110 1010 1101 1011 1110 1110 1111
Binary digits have simple p