EEE 433/591 Lab II
Reading Materials
Chapter 7 - Sections 7.1 to 7.5
Chapter 8 - Sections 8.1 to 8.4
Chapter 10 - Sections 10.1 to 10.6
Topics:
CS Amp with I source
Current Biasing
Cascode
Lab 2
Active CS Amp, Current Source
Part I Due: Sept 19
Homework 5
Practice in Small-Signal Analysis for Differential Amplifiers
Recommended Completion Date: November 07, 2013
Note: Homework assignments are not collected or graded. They are intended for you to
enhance your knowledge, practice your circuit anal
Cascode Amp & Voltage Analyses
EEE433/591: Week 3
09/11/2013
Jennifer Kitchen
1
Announcements
BOTH parts of Lab Assignment 2 are due Sept. 20 at
5:00pm. Some hints will be posted for FFT plotting.
BUT, I HIGHLY recommend that you complete Part I this
we
Current Mirrors and Amps
EEE433/591: Week 2
09/04/2013
Jennifer Kitchen
1
Announcements
Lab Assignment 1 posted last week.
Recommended HW posted. Complete before class next
Monday. Quiz on Monday.
For [email protected] help, a rev
Cascode Amp & Voltage Analyses
EEE433/591: Week 3
09/11/2013
Jennifer Kitchen
1
Announcements
BOTH parts of Lab Assignment 2 are due Sept. 20 at
5:00pm. Some hints will be posted for FFT plotting.
BUT, I HIGHLY recommend that you complete Part I this
we
Examples & MOS Differential Amplifiers EEE433/591:
Week 4
09/16/2013
Jennifer Kitchen
1
Announcements
Quiz II on Wednesday.
BOTH parts of Lab Assignment 2 are due this Friday by
5pm. There are 2 tutorials posted in the Laboratory
folder to help you: 1)
FREQUENCY RESPONSE
& FINAL PROJECT
EEE433/591: Week 12
11/13/2013
Jennifer Kitchen
Announcements
Outline
Cascode Gain Stage
Frequency Response
Cascode Gain stage
Rigorous analysis
is complex
Miller effect is
mitigated by the
cascode transistor
Output t
Short Cuts &
Differential Amplifiers
EEE433/591: Week 7
10/07/2013
Jennifer Kitchen
1
Announcements
Lab Assignment to be posted.
Lab 2 grades to be nished this week.
No class next Monday (Oct. 14) Fall Break
Exam 1 Grades
FREQUENCY RESPONSE
& FINAL PROJECT
EEE433/591: Week 12
11/13/2013
Jennifer Kitchen
1
Announcements
Midterm Exam 2 November 20th
Final Project Part I due Friday, midnight.
Help session to be held today at 4:30pm in SCOB 210.
INTRO TO LDO DESIGN
EEE433/EEE591
Ahmed Hashim
Power Electronics
Applications:
Information Technology
gy
APPLICATIONS
Portable Electronics
Telecommunications
Medical Systems
Entertainment
frames
onsumers
cessed
onics
Multiple rails for processor,
rent,
Homework 2
Chapter 3 Recommended Homework Problems
Course Book: Analog Integrated Circuit Design, 2nd Edition, Tony Carusone, David
Johns, and Kenneth Martin
Recommended Completion Date: Sept. 18, 2013
Note: Homework assignments are not collected or grade
Homework 4
Practice in Small-Signal Analysis
Recommended Completion Date: October 16, 2013
Note: Homework assignments are not collected or graded. They are intended for you to
enhance your knowledge, practice your circuit analysis, and highlight the most
Lab I - CADENCE Tutorial
EEE 433/591
The objective of this lab is to learn CADENCE and design a simple Common
Source Amp and simulate the IV-Curves for the Basic Transistor.
CADENCE
Cadence ICFB (IC Front to Back environment) is a software package used fo
Waveform Calculator User Guide
RPN Mode
Derivative (deriv) Function
The deriv function computes the derivative of the buffer expression. You can plot the resulting
waveform.
1. Select deriv.
2. Enter the expression and closing parenthesis into the calcula
Lab #2 CS Theoretical Calculations
1. Start by picking a
2. Calculate the
value, about 5-10% of
of the NMOS
*Remember,
*
3. Write out the saturation current equation, and fill in everything you know so far. Youll
be left with two unknowns,
and ( ) . You c
EEE 433/591 Fall 2013
First Name: _
Last Name: _
Lab#1 Assignment
ASU ID: _
This is a guide to follow for submission of Lab 1.
TOTAL POINTS POSSIBLE: 100
Due Date: Friday, September 6 at 5:00pm. Electronic submission via
Blackboard only. No hard copies ac
Quiz 1
No Phones, 15 minutes, No cheat sheets
Please write the following at the Top of your paper:
LASTNAME, FIRSTNAME, ASU ID
Turn-in your Quiz as you exit the classroom
1
Quiz 1
(a) Verify [show] that when VDS=Veff is used in the
triode equation for a M
EEE 433 Sample Exam I Analog Circuit Design Fall 2013
Closed Notes & Books
Note: The exam will be closed books, closed notes. I will hand out the Formula sheet in
the class. The focus will be on small signal model, CS amp, and Diff amp (to the end of
what
Name: I
Exam #1 Spring 2013
BEE 433 February 14, 2013
Closed book, notes, one 8.5 X 11 crib sheet and calculator are allowed. Show all
work and include units for all numerical answers. State allassumptions and p lease
circle the ﬁnal answers where approp
Name:
Exam #2 a Spring 2013
tuus433 7 .Apﬁ19,2013
Closed book, notes, two 8.5 x 11 crib sheet and calculator are allowed. Show all
work and include units for all numerical answers. State all assumptions and glease
circle the ﬁnal answers where approgriat
Quiz III
Assume that the transistor M1 has transconductance of gm1
and drain-to-source resistance of rds1. Assume that the device
is biased in active region.
a)Derive the low-frequency small-signal gain (Vout/Vin) for the
amplifier shown in the figure bel
Quiz IV
a) Sketch the magnitude (in dB) and phase (in degrees) Bode plots for
the following transfer function:
H ( s)
10
s
1
100
b) A transfer function has the following zeros and poles:
one zero at s = 0 and one zero at s = ; one pole at s = -100 a
EEE 335
Lab # 2 Design and Analysis of CMOS Gates
Objective: The objective of this lab is to design and develop a library of basic gates. You will be using
CADENCE Spectre circuit simulations. These gates will be used in the design a two bit adder and
you
EEE 433
Differential to Single Ended Amplifier
Hand in simulations and rough analysis for each part:
The objective of this lab is to design a Differential to a single ended amp.
See the handout on test-bed for PSRR and CMRR
Parameters:
Current Supply: I
Lab4 OpAmp Design
Lab 4 Design of an Operational Amplifier:
Two-Stage Amplifier: Differential to Single Ended followed by a Common Source Stage
(remove MC6 and MC7 below) or followed by a Single Ended Telescopic Cascode
(include MC6 and MC7 below). You wi