Stanford University
EE 320: Nanoelectronics
Lecture 01 Introduction
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~hspwong
Center for Integrated Systems
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #1: Tunnel FET
Out: Friday, April 12th, 2013
Due: Thursday, April 18th, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 2 problems in this problem set. Please turn in solutions to all pr
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #1: Tunnel FET
Out: Friday, April 12th, 2013
Due: Thursday, April 18th, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 3 problems in this problem set. Please turn in solutions to all pr
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #2: Tunnel FET
Out: Friday, April 19th, 2013
Due: Thursday, April 25th, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 4 problems in this problem set. Please turn in solutions to all pr
EE320 Final Project, Spring 2013
Due June 10th, 2013, at 5pm by
email to ee320ta2013@gmail.com
Include your name, SU student number, and email in the cover page
Please put filename format as FirstInitial_LastName_FirstInitial_LastName.pdf
One of the objec
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #2: Tunnel FET
Out: Friday, April 19th, 2013
Due: Thursday, April 25th, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 4 problems in this problem set. Please turn in solutions to all pr
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #3: Graphene
Out: Sunday, April 28th, 2013
Due: Thursday, May 2nd, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 5 problems in this problem set. Please turn in solutions to all problem
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #4: Graphene
Out: Friday, May 4th, 2013
Due: Thursday, May 9th, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 4 problems in this problem set. Please turn in solutions to all problems t
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #5: Graphene and CNT
Out: Monday, May 13th, 2013
Due: Sunday, May 19th, 2013 (Paul Allen 332X or Email by 11:59PM)
Notes:
There are 3 problems in this problem set. Please turn in solutions to all probl
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #6: Graphene devices
Out: Tuesday, May 21st, 2013
Due: Sunday, May 26th, 2013 (Paul Allen 332X or Email by 11:59PM)
Notes:
There are 4 problems in this problem set. Please turn in solutions to all prob
EE 320
Winter 2012-2013
Prof. Philip Wong
Problem Set #3: Graphene
Out: Sunday, April 28th, 2013
Due: Thursday, May 2nd, 2013 (in class or Paul Allen 332X by 12:15PM)
Notes:
There are 5 problems in this problem set. Please turn in solutions to all problem
Contents
General remarks
The classical region
Tunneling
The connection formulas
Literature
The WKB approximation
Quantum mechanics 2 - Lecture 4
Igor Lukaevi
cc
UJJS, Dept. of Physics, Osijek
29. listopada 2012.
Igor Lukaevi
cc
The WKB approximation
UJJS,
Problem 3
1. Doping occurs due to the changes in the graphene channel in the vicinity of the drain
contact. The amount of doping due to the high-field stress can be observed by the change
of Vcnp in a IdVg sweepwhen overdrive voltage is increased beyond a
Problem 3
1. In a GNR, the confinement gap is inversely proportional to width of the ribbon while that
of a CNT, the quantum confinement dictates a slightly different energy state spacing. The
result of the difference of quantum confinement with a circumf
EE320 HW 4
Due 5/10/2013
EE320 HW 4
Problem 4
1. These two curves represent the Cq as a function of local electrostatic at equilibrium
versus at an 0.2V bias voltage. The differences between these two curves illustrates the
factors of the transmission pro
Stanford University
EE 320: Nanoelectronics
Lecture 02 Energy Efficient Electronic Devices
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~hspwong
Center
Stanford University
EE 320: Nanoelectronics
Lecture 03 Tunneling Devices
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~hspwong
Center for Integrated Sys
Stanford University
EE 320: Nanoelectronics
Lecture 04 Tunneling Current, TFET Model,
Device Optimization
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~
Stanford University
EE 320: Nanoelectronics
Lecture 5 Introduction to Carbon Nanomaterials
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
Seunghyun Lee
Postdoctoral Scholar
sean
Stanford University
EE 320: Nanoelectronics
Lecture 6 Graphene Band Structure
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
Seunghyun Lee
Postdoctoral Scholar
seansl@stanford.e
Stanford University
EE 320: Nanoelectronics
Lecture 7 Carbon Nanotube Band Structure
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
Seunghyun Lee
Postdoctoral Scholar
seansl@sta
Slide 1
Stanford University
EE 320: Nanoelectronics
Lecture 02 Energy Efficient Electronic Devices
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~hspwong
Slide 1
Stanford University
EE 320: Nanoelectronics
Lecture 03 Tunneling Devices
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~hspwong
Center for Integr
EE320
HW1
Hw1
1. a) According to paper (a), tunneling current can be enhanced by lowering the source side
tunneling barrier by bandgap engineering the heterojunctions. In paper (b), optimizing the
oxide thickness and reducing interface states allows for h
EE320 HW2
Due 4/25/2013
EE320 HW2
Problem 1
1. Ambipolarity is suppressed by designing the doping profile of the device such that it is
asymmetric, forcing movement of one type of carrier to be restricted. Ambipolarity is not
ideal at sufficiently negativ
Problem 4
1. Growing graphene on Ni produces multilayers at the grain boundaries, and since the grain
size of Ni is small, this is not ideal. The result of this is non-uniform, non-single layer
graphene. According to the paper, growth on Cu seems to indic
Stanford University
EE 320: Nanoelectronics
Lecture 0 Admin
H.-S. Philip Wong
Professor of Electrical Engineering
Stanford University, Stanford, California, U.S.A.
hspwong@stanford.edu
http:/www.stanford.edu/~hspwong
Center for Integrated Systems
EE 320
D