This is a simple tutorial on using the new Cadence version 6 for creating an inverter. This
tutorial covers setting up the environment, and designing a simple inverter from beginning to
LVS clean.
First, log into a computer in the lab. This can be done si
EE 224
Digital Circuit Design
Switch Level Design Review
Design Using MOS Switches
Start with Architecture
NMOS, PMOS, CMOS
Function definition
Loop 0s and 1s, or split function
Perform reductions
Simplify
Factor, build inverse, split function
EE 224 not
EE 224
Digital Circuit Design
Shifters, Rotators, Crossbars
Shifters
Common Logical Function
7
6
5
4
3
2
1
0
Shift Left 2
5
4
3
2
1
0 0 0
Shift Left is an unsigned multiply by 2SA
EE 224 notes
-2-
Morris Jones
1
Shifters
Move data in the shift direction
EE 224
Digital Circuit Design
The MOS Transistor
Round 1
How to make a MOS Transistor
MOS = Metal Oxide Semiconductor
In the early days, it was made of metal!
Poly-silicon was easier and cheaper to build
We are too lazy to change the name to POS
Many Fa
EE 224
Digital Circuit Design
Instructor
Morris Jones
Email [email protected]
EE 224 notes
-2-
Morris Jones
1
Class resources
Web
www.engr.sjsu.edu/mjones
Yahoo email group
sjsuee224
Grader in the lab (TBD)
Project team
Find 2 or 3 of the hardest w
EE 224
Digital Circuit Design
MOS Rams
The Read Path
Pull Up
Column Mux
Small
Large Load
Latch
EE 224 notes
Bit Connection
-2-
Morris Jones
1
Read Path Thoughts
The Same current flows through all
devices.
Try and keep the voltage change as
small as poss
EE 224
Digital Circuit Design
MOS Rams
A common logic need is memory
Small amounts of memory are built with
latches and flip flops
4Store values used in logic
Registers in microprocessors
Cursors in graphics chips
Large amounts of memory require
circu
EE 224
Digital Circuit Design
Multipliers
Multiplication
Multiply one number by the other, add
up the shifted results
Since there are no carries in binary
multiplication, it is much easier
0*0=0 0*1=0 1*0=0 1*1=1
EE 224 notes
-2-
Morris Jones
1
Simple V
EE 227
Digital Circuit Design
Other CMOS Logic Styles
Alternate Schmidt
The previous Schmidt has current draw
as the input changes
An alternate approach is to change the
kn/kp ratio using a second switch
Math is simply the VM equation
EE 227 notes
-2-
Tphl( A , Cl, K) := A
K( W , L) :=
Cl
K
W
L
Ci := 10
A := 30000
Given
675 10 = Tphl A , Ci + 500 ,
3
74 10 = Tphl A , Ci + 50 ,
0.24
1.2
3
1.2
0.24
res := Minerr( A , Ci)
6.678 103
5.408
res =
Tphl An , 300 ,
An := res
0
= 4.007 105
0.24
1.2
Tpl
EE224
CMOS Equations leading to
Delay calculation in CMOS
Terms starting with the inverter
Simple product.
One Input, One output
Easiest to understand
Math is easier
Can be done by hand
EE 224 notes
Inputs use letters
from front of alphabet
Outputs fro
EE 224
Digital Circuit Design
Adder Blocks
Binary Coded Decimal (BCD)
4 binary bits represent one decimal digit
0=0000
1=0001
2=0010
3=0011
4=0100
5=0101
6=0110
7=0111
EE 224 notes
8=1000
9=1001
The other combinations of 4 bits are
unused.
In some system
EE 227
Digital Circuit Design
Other CMOS Logic Styles
Dynamic Logic
Most circuits are synchronous
Have a clock
Work in fixed time windows
Clock rates are often fixed
Faster than the leakage will remove charge
Reduced space can be obtained by
using Dyna
EE224 Final S04
A
1
Name:_
Last 4 of Student ID_
Place all answers on this exam sheet. You will turn in no additional paper. If needed, please work on
scratch paper, and transfer your answers to this sheet. Answer all parts of questions. When several
answ