ELEG 2903 / CENG 2113: HW#1
(due Tuesday, September 9) Each question is worth 1 point, for a total of 12 points. Show your work, and check your answers. 1a) Convert 245.357d to binary. Show 10 bits for the integer portion and 4 bits for the fractiona

DIGITAL DESIGN I: EXPERIMENT #7 RIPPLE-CARRY ADDER DESIGN
Purpose The purpose of this experiment is to design a Full Adder block and utilize this block to create a 4-bit unsigned Ripple Carry Adder (RCA). References 1) Digital Systems: Principles and

DIGITAL DESIGN I: EXPERIMENT #6 COMBINATIONAL LOGIC DESIGN USING VHDL AND DE2 IMPLEMENTATION
Purpose The purpose of this experiment is to design combinational logic using VHDL, simulate your design using Mentor Graphics, and then implement and test y

DIGITAL DESIGN I: EXPERIMENT #5 7-SEGMENT DISPLAY DESIGN
Purpose The purpose of this experiment is to learn how to display a 4-bit binary number in hexadecimal form on a 7-segment display on the Altera DE2 FPGA board. References 1) Digital Systems: P

DIGITAL DESIGN I: EXPERIMENT #4 COMBINATIONAL LOGIC DESIGN USING MULTIPLEXERS AND MSI IMPLEMENTATION
Purpose The purpose of this experiment is to become familiar with using multiplexers for implementing Boolean functions. You will then use Alteras Qu

DIGITAL DESIGN I: EXPERIMENT #3 COMBINATIONAL LOGIC DESIGN USING K-MAPS AND SSI IMPLEMENTATION
Purpose The purpose of this experiment is to design a minimized combinational logic circuit using a K-map and Boolean algebra. You will then use Alteras Qu

DIGITAL DESIGN I: EXPERIMENT #2 QUARTUS II FAMILIARIZATION: COMBINATIONAL LOGIC DESIGN USING TRUTH TABLES AND SSI IMPLEMENTATION
Purpose The purpose of this experiment is to design a minimized combinational logic circuit using a truth table and Boole

DIGITAL DESIGN I: EXPERIMENT #1 DE2 BOARD FAMILIARIZATION: UNSIGNED AND 2S COMPLEMENT ADDITION
Purpose The purpose of this experiment is to compare unsigned and 2s complement addition. You will use an Altera DE2 (Development and Education) FPGA board

ELEG 2903 / CENG 2113: HW#6
(due Thursday, December 4) Questions 1 6 are worth 2 points each, question 7 is worth 3 points, and questions 8 9 are worth 5 points each, for a total of 25 points. Show your work, and check your answers. 1) The input si

ELEG 2903 / CENG 2113: HW#4
(due Thursday, October 23) Question 1 is worth 4 points and the rest are worth 2 points each, for a total of 14 points. Show your work, and check your answers. 1) Design a minimal implementation of the following 4-bit comp

ELEG 2903 / CENG 2113: HW#3
(due Tuesday, October 14) Each question is worth 2 points, for a total of 20 points. 1) Using Karnaugh maps, determine a minimal SOP and POS expression for each of the following Boolean functions. a) f(x, y, z) = m(1, 3, 4

ELEG 2903 / CENG 2113: HW#2
(due Tuesday, September 23) Each question is worth 1 point, for a total of 17 points. Show your work, and check your answers. 1) Prove the following relationships using Boolean Algebra by manipulating the left side of the

DIGITAL DESIGN I: EXPERIMENT #8 STOPWATCH DESIGN
Purpose The purpose of this experiment is to combine many of the concepts used in previous labs to design a stopwatch that has the following features: - it will have a Start/Stop button that switches t