EE 311 Electronic Circuit Design II
Spring 2010
Exam I
Name: _Solutions_
Problem 1:
_
Problem 2:
_
Problem 3:
_
Problem 4:
_
Problem 5:
_
Problem 6:
_
Total:
_
PSU ID Number: _
Instructions:
1. Please put your name and PSU ID number in the above spaces.
2
EE 311 Problem Set No. 9 Solutions
11.35
(a) I Q I 1 K n3 VGS 3 VTN 2
0.25 0.20VGS 3 0.4 VGS 3 1.518 V
2
5 1.518 5
33.9 k
0.25
0.25
0.125 mA
(b) I D1 I D 2
2
O1 O 2 V I D1 RD1 V I D 2 RD 2 I D 2 RD 2 I D1 RD1
R1
(i) O1 O 2 0
(ii ) O1 O2 0.12515.5 14
EE 311 Problem Set No. 10 Solutions
12.2
(a) A f
A
10 5
80
0.01249
1 A
1 10 5
5 10
66.58
1 5 10 4 0.015
_
4
(b) A f
12.4
(a)
A
1
125
1 A
0.0080
Af
(b)
Af (125)(0.9975) 124.6875
124.6875
A
1 (0.008) A
124.6875 1 (0.008) A A
124.6875 A 1 0.997
EE 311 Problem Set No. 11 Solutions
12.26
IE
Also
Then
V V
(1 hFE )
I0 S
hFE
RE
I0 hFE ( AgV )
V
so
I0
hFE Ag
V
I0
1 hFE
I0 S
hFE
RE hFE Ag RE
1 hFE
VS
1
I0
hFE Ag RE
RE
hFE
Ag (1 hFE ) RE 1
VS
I0
hFE Ag RE
RE
hFE Ag RE
hFE Ag
I0
I0
1
VS RE 1
EE 311 Problem Set No. 12 Solutions
12.71
RTH R1 R2 24 150 20.69 k
R2
24
VTH
R R VCC 24 150 12 1.655 V
2
1
VTH V BE on
1.655 0.7
I BQ
0.0133 mA
RTH 1 hFE R E 20.69 511
I CQ 0.666 mA
0.666
25.62 mA/V
0.026
500.026 1.951 k
r
0.666
100
ro
150
EE 311 Electronic Circuit Design II
Spring 2010
Exam 1 Information
1.
Exam No. 1 is scheduled for Tuesday, February 23, from 6:30 8:00 PM in room 123 Electrical
Engineering East. Please arrive early and be in your seat so that we can begin on time.
2.
The
EE 311 Electronic Circuit Design II
Spring 2010
Sample Exam I
This sample exam combines problems from several exams from previous semesters.
Problem 1
A circuit consists of two RC networks having break (corner) frequencies of 10 MHz each. Functionally
the
EE 311 Electronic Circuit Design II
Spring 2010
Exam 2 Information
1.
Exam No. 2 is scheduled for Tuesday, April 6, from 6:30 8:00 PM in room 123
Electrical Engineering East. Please arrive early and be in your seat so that we can begin
on time.
2.
The exa
EE 311 Electronic Circuit Design II
Spring 2010
Exam 2 Solutions
Name: _Solutions_
Problem 1:
_
Problem 2:
_
Problem 3:
_
Problem 4:
_
Problem 5:
_
Problem 6:
_
Total:
_
PSU ID Number: _
Instructions:
1. Please put your name and PSU ID number in the above
EE 311 Electronic Circuit Design II
Sample Exam 2
Problems 1 2
BJT Parameters:
= very large
VA = very large
VEB2 = 0.6 V
VT = 26 mV
1.
Find the reference current, IREF, for the current source shown in the above figure.
2.
Choose a value for resistor R1 t
EE 311 Electronic Circuit Design II
Spring 2010
Sample Exam 2 Answers
1
1 mA
2
5.09 k
3
110 A
4
1.2
5
56 k
6
2160 V/V
7
21 k
8
462 A
9
4.25 V
10
Cascode Differential Amp.
11
Cascode Mirror w/Active Load
12
Cascode Current Mirror
13
1.96 G
14
111 dB
15
20.
EE 311 Electronic Circuit Design II
Spring 2110
Assignment 1
Due: Friday, January 22, in class
Frequency Response
When designing an amplifier, one is not merely interested in the gain of the circuit at midband
frequencies but rather how the gain varies ac
EE 311 Electronic Circuit Design II
Spring 2010
Assignment 2
Due:
Friday, January 29, in class
Amplifier Frequency Response (continued)
We examine the behavior of coupling, load, and bypass capacitors in transistor amplifier circuits.
Coupling and load ca
EE 311 Electronic Circuit Design II
Spring 2010
Assignment 3
Due:
Friday, February 5, in class
Amplifier Frequency Response (continued)
To simplify the hand analysis of circuits containing a feedback capacitance, we introduce Millers
Theorem, which enable
EE 311 Problem Set No. 8 Solutions
11.5
a.
Neglecting base currents
30 0.7
R1 73.25 k
0.4
VCE1 10 V VC1 9.3 V
15 9.3
RC
RC 28.5 k
0.2
I1 I 3 400 A R1
b.
r
100 0.026
13 k
0.2
50
r0 Q3
125 k
0.4
We have
Ad
100 28.5
RC
Ad 62
2 r RB
2 13 10
RC
EE 311 Problem Set No. 7 Solutions
10.67
P I REF I O1 I O 2 I O3 V V
5 I REF 0.1 0.2 0.41.8 1.8 I REF 0.689 mA
VDS 2 sat 0.4 VGS 2 0.4 VGS 2 0.8 V VGS
k W
2
I REF n VGS 1 VTN
2 L
1
0.1 W
W
2
0.689
0.8 0.4 86.1
2 L 1
L 1
0.1 W
W
2
I O1 0.1
EE 311 Problem Set No. 6 Solutions
1. Solve Exercise Problem 10.2 on page 692 of the textbook
Exercise Problem 10.2. The two-transistor current mirror has the following circuit and
device values: V+ = 5 V, V- = - 5 V, R1 = 12 k, = 75, and VBE(on) = 0.7 V.
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 3
Due:
Monday, September 13, in class
Amplifier Frequency Response (continued)
To simplify the hand analysis of circuits containing a feedback capacitance, we introduce Millers
Theorem, which enable
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 4
Due:
Monday, September 20, in class
Frequency Response (concluded)
Power Amplifiers
We complete our frequency response analysis by considering the cascode and common-drain/collector
amplifier stag
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 5
Due:
Monday, September 27, in class
Power Amplifiers
In this section of the course we examine several different power amplifier circuits using both bipolar and
MOS transistors. Amplifiers can be c
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 6
Due:
Monday, October 11, in class
Integrated Circuit Biasing
Current Sources
In integrated circuits the use of resistors is minimized because they can consume too much chip real
estate. Instead, I
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 7
Due:
Monday, October 18, in class
Active Current Sources
Active Loads
The use of current mirrors as active current sources and loads is fundamental to the design of integratedcircuit amplifiers. C
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 8
Due:
Monday, October 25, in class
The Differential Amplifier
Differential and Common-mode Gains and Impedances
Common-mode Rejection Ratio (CMRR)
The differential amplifier is introduced as a fund
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 9
Due:
Monday, November 1, in class
Differential Amplifiers with Active Loads
Simple Op Amps
Differential Amplifier Frequency Response
Replacing discrete resistive loads with active loads in a diffe
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 10
Due:
Monday, November 15 in class
An Introduction to Feedback
Feedback Topologies
The topic of feedback is introduced as a means of reducing variations in circuit performance due to
parameter var
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 11
Due:
Monday, November 29, in class
Feedback Amplifiers
We have learned that a feedback network may be classified into one of four topologies: series-shunt,
shunt-series, series-series, or shunt-s
EE 311 Electronic Circuit Design II
Fall 2010
Assignment 12
Due:
Monday, December 6 in class
Loop Gain
Stability of the Feedback Circuit
Frequency Compensation
The loop gain concept is important because it correlates well with the methods used in the lab
EE 311 Problem Set No. 1 Solutions
7.12
(a)
Vo
R 2 R3
10 40
0.833
Vi
R1 R2 R3 10 10 40
(b)
Vo
R2
10
0.50
Vi
R1 R2 10 10
1
R3
R3
1
sC
R3
(c)
1
sC
1 sR3 C
R3
sC
R3
R2
V s
1 sR3 C
R 2 R3 sR2 R3 C
T s o
s R R R3
Vi
R1 R2 R3 sR1 R 2 R3 C
1
2
1 sR3 C
R
EE 311 Problem Set No. 3 Solutions
7.26
(a)
5 VSG
2
K P VSG VTP
R1
2
5 VSG 1 1.2 VSG 1.5 1.2 VSG 3VSG 2.25
2
2
1.2VSG 2.6VSG 2.3 0 VSG 2.84 V
I DQ 1.8 mA
VSDQ 10 1.8 1.2 1.2 VSDQ 5.68 V
g m 2 K P I DQ 2 1 1.8 2.683 mA / V
ro
(b)
Ris
1
1
0.3727 k
g