Lectures 12-15
CMOS Logic
Professor Sunil Bhave
School of Electrical and Computer
Engineering
Sept 23, 2016
Combinational vs. Sequential
Logic
In
Combinational
Logic
Circuit
In
Out
Combinational
Logic
Circuit
State
Combinational
Output = f(In)
Sequential
Lectures 12-15
CMOS Logic
Professor Sunil Bhave
School of Electrical and Computer
Engineering
Sept 23, 2016
Combinational vs. Sequential
Logic
In
Combinational
Logic
Circuit
In
Out
Combinational
Logic
Circuit
State
Combinational
Output = f(In )
Sequential
UNIVERSITY OF CALIFORNIA
College of Engineering
Department of Electrical Engineering and Computer Sciences
Last modified on February 13, 2003 by Dejan Markovic ([email protected])
Prof. Jan Rabaey
EECS 141
Spring 2003
Homework 4
Due Thu, Feb 20, 5pm
UNIVERSITY OF CALIFORNIA
College of Engineering
Department of Electrical Engineering and Computer Sciences
Last modified on February 13, 2003 by Dejan Markovic ([email protected])
Prof. Jan Rabaey
EECS 141
Spring 2003
Homework #4 Solutions
Problem 1
ECE 474
Sunil Bhave
Problem 1. Figure above shows a practical implementation of a pulse-triggered latch.
Clock Clk is ideal with 50% duty cycle.
a) Draw the waveforms at nodes Clk, Clkd, X and Q for two clock cycles, with D equals
0 in one cycle and 1 in
UNIVERSITY OF CALIFORNIA
College of Engineering
Department of Electrical Engineering and Computer Sciences
Last modified by Jing Xue ([email protected])
Andrei Vladimirescu
Homework #5 Solutions
Due Friday, March 2, 5pm @240 Cory
EECS141
Problem 1
UNIVERSITY OF CALIFORNIA
College of Engineering
Department of Electrical Engineering and Computer Sciences
Last modified on February 28, 2007
Andrei Vladimirescu
Homework #6
Due 03/09/07, 5pm, in 240 Cory
EECS 141
1. Wire Models
a. Compute the 0%-50% dela
Given the inputs A1, A2, A3 and CLK below, draw the timing diagram for B and C. DO NOT
assume the charge and discharge times are zero. CLEARLY label any relevant voltages or delays
that highlight crucial elements of operation. You do not have to calculate
ECE 471 ' term #1 WIN-201
Name:
Student Number:
Midterm Score:
Problem 1 [Total 50 Points):
Problem 2 (Total 30 Points):
Problem 3 (Total 20 Points):
TQQ]:
NOTE: Make ALL Assumptions. Some partial credit given, given that ALL
assumptions are first made an
UNIVERSITY OF CALIFORNIA
College of Engineering
Department of Electrical Engineering and Computer Sciences
Jan M. Rabaey
Homework #4
EECS 141
Due Monday, February 23, 5pm, box in 240 Cory
1. Given the RC network below:
Figure 1 RC network.
(1) Calculate t
/
The investigation of high-per for mance AlGaAs/GaAs heterostr ucture bipolar tr ansistor s
NSC 90-2215-E-006-014
90 8 1 91 7 31
Abstr act
We have successfully fabricated
AlGaAs/GaAs
heterojunction
bipolar
transistor by MOCVD. Measurements
indicated t
11 NDR and Gunn Effect (Transferred Electron) devices
Gunn Diodes represent an example of negative differential resistance (NDR) devices
Why achieving the NDR is so attractive?
NDR
Load
Power dissipated in the diode = I2 x Rd < 0
The NDR diode can serve a
Silicon-Germanium
Heterojunction Bipolar Transistors
-An idea whose time has come
Ankit Goyal, IIT Roorkee
Tutor: Prof. S. Kal, IIT Kharagpur
Presentation Overview
y History, need of SiGe Technology
y Physics behind HBTs
y Bandgap Engineering
y SiGe Strai
ELCT 882- High-speed Semiconductor Devices
Instructor: Grigory Simin
[email protected]
High-speed Semiconductor Devices
The need for high-speed semiconductor devices:
Wireless communications high speed, high-power
transistors
Optical communications high s
09 Heterojunction FET (HFET) principles
MOSFET and HFET devices are both very
similar to a plain capacitor
Metal
A
V
d
Semiconductor
Let the area of the capacitor plates be A.
The induced charge Q can be expressed as
Q = q A nS,
where q = 1.6 10-19 C is t
14 Gunn Oscillators
Most of Gunn oscillators use the effect of high-filed domain instability
No domain
Domain propagates
Current-voltage characteristics of the Gunn diode
I-Vs are needed to design the oscillator circuits
Main characteristics of the stable
Waveguide structure of hetero-lasers
The Fabry-Perot etalon
Parallel mirrors
The separation between the mirrors is equal to an integer number of /2,
where is the wavelength of electromagnetic radiation.
In a laser, one of the mirrors partially transmits l
04 Heterojunctions (continued)
Example for the class work
Construct a band diagram for a (p) GaAs/(N) Al0.35Ga0.65As heterojunction at
thermal equilibrium.
The doping level and relevant material parameters are:
for the p-side GaAs, NA = 3 x 1019 cm-3;
and
13 Gunn Effect Amplifiers
I. Stable Gunn Diodes: I-V Characteristics
If the sample parameters do not meet the Kroemer criteria,
the sample is stable, i.e. the high-field domains do not form.
However, the differential mobility is still negative at high ele
20 Avalanche and Quantum Well Photodetectors
1. Avalanche Photodetector (APD) Principles
Ionization coefficient e h
Ionization coefficient e > h
The avalanche process is asymmetric (i.e., the probability for initiating an avalanche is usually
greater for
15 Transit Time and Tunnel NDR Devices
Schematics of Transit-time NDR diode.
A packet of carriers (e.g., electrons) is generated in a confined and narrow zone
(generation region) and injected into the adjacent fully depleted zone (drift region).
The curre
19 High-speed photodetectors
Photodetectors in high-speed communications
A photodetector is an optoelectronic device that absorbs optical signals and
converts them into electrical signals.
Light emitter
(Laser)
Optical link
Photodetector
(fiber or open a
06 BJT Performance limitations and HBT concept
Current gain limitations
The current gain limited by the injection into emitter,
Dn N de X e
o =
D p N ab W
The current gain limited by the recombination in the base,
R =
2L2nb
W2
The overall maximum common-e