EE 2381 DIGITAL COMPUTER LOGIC
III.C Data Selectors/Multiplexers
Implementation
Design
A data selector or multiplexer will route one
of 2n inputs to a single output. Below is a
4-line to 1-line multiplexer with a strobe.
S0
S1
G'
D0
D1
Y
D2
D3
Topic 17
EE 2381 DIGITAL COMPUTER LOGIC
II. Combinational Logic Circuits
Logic Systems
Basic Logic Operations
A logic system has 2 distinguished values:
False
vs
True
Low
vs
High
0
vs
1
Voltage level ranges are commonly used to
represent logic values.
Logic 0
0
EE 2381 DIGITAL COMPUTER LOGIC
II.E Alternate Realizations
DeMorgans Law
NAND-NAND & NOR-NOR
XOR
Def: The maximum number of gates
cascaded in series between the input and
output is called the number of levels.
Def: Fan-in specifies the number of inputs
EE 2381 DIGITAL COMPUTER LOGIC
III.F Binary Arithmetic - Formal
Unsigned vs Signed Numbers
Examples
We consider formal methods for
representing binary numbers in a computer.
Let N be an n-bit number. Typical values
of n in modern computers are 8, 16,
EE 2381 DIGITAL COMPUTER LOGIC
II.D Minimal Realizations
Covering Loops
Prime Implicants
A Karnaugh map is a graphical
representation of a Boolean function. The
key idea is to cover all the 1s of a function
with the smallest number of prime
implicants
EE 2381 DIGITAL COMPUTER LOGIC
II.A Boolean Algebra
Basic Logical Identities
Algebraic Simplification
An algebra is a mathematical structure with
two binary operations:
+ addition
OR
multiplication AND
It is closed under both binary operations and
has
EE 2381 DIGITAL COMPUTER LOGIC
I.B Base R Arithmetic
Binary Integers
Add, Subtraction, Multiply and Divide
Octal Integers
Add, Subtraction, Multiply and Divide
Recall the mechanics of decimal arithmetic:
Addition
Subtraction
Multiplication
Division
Si
Lab #3
Rabin Bastola
Digital Logic Circuits
Introduction
Digital circuits are the electronic circuits in all computers and microprocessors. The main purpose of this
lab was to study about digital circuits and Boolean algebra, the mathematics of digital ci
Rabin Bastola
9/21/16
Lab # 4
Digital Logic Delays
Introduction
In this lab we will study the average propagation delay of two different families of NAND logic gates.
Mathematically, for abstract Boolean functions, the logic values occurs instantly. Howev
EE 2381 DIGITAL COMPUTER LOGIC
II.F
Delays
Physics
TTL Logic Gates
All physical logic gates have delays
between the inputs and corresponding
outputs.
Recall from Physics 1304 that electrical
systems can be modeled by three types of
circuit elements co
EE 2381 DIGITAL COMPUTER LOGIC
II.C Karnaugh Maps
Graphical Representation
Implicants
Recall that any Boolean function can be
expressed in a standard (canonical) SOP
form. Additionally, this can be expressed as
a sum of minterms.
Topic 09
EE 2381
2
1
E
EE 2381 DIGITAL COMPUTER LOGIC
Introduction and Overview:
Analysis and Synthesis
Combinational and Sequential Circuits
Simulation vs Hardware
EE 2381 Digital Logic Topics
Digital computers and information
Combinational logic circuit analysis
Combinatio
EE 2381 DIGITAL COMPUTER LOGIC
III.B Decoders/Demultiplexers
Implementation
Design
Tri-State Logic
MIMO Components
So far we have discussed single-input,
single-output (SISO) components, such as
buffers and NOT gates, and multi-input,
single-output (MI
EE 2381 DIGITAL COMPUTER LOGIC
I. Digital Computers and Information
Decimal Numbers
Base R Numbers
Base R Number Decimal Number
Def: Decimal Integer:
531
= 531
= 500 + 30 + 1
= 5100 + 310 + 1
= 5102 + 3101 + 1100
Def: Decimal Fraction:
0.943 = .943
=
EE 2381 DIGITAL COMPUTER LOGIC
I.C Binary Codes
Weighted Codes
Non-weighted Codes
Binary codes are used to represent a
decimal digit with several binary bits.
Convenient and direct representation
Simplify interface to I/O devices
Detect and/or corre
EE 2381 DIGITAL COMPUTER LOGIC
II.B Boolean Function Representations
Sums of Products
Products of Sums
Def: In a Sum of Products (SOP) all
products are products of a single variable.
Def: In a Product of Sums (POS) all sums are
sums of single variables.
EE 2381 DIGITAL COMPUTER LOGIC
I.A Base Conversions
Decimal Number Base R Number
Integer Part
Fractional Part
Division Algorithm: Given decimal integers
n and R, there exists unique decimal
integers q and r such that
n = qR + r
and
0 r < R.
We call r t
EE 2381 DIGITAL COMPUTER LOGIC
III.E Binary Arithmetic - Subtraction
Three Methods
Combined Addition and Subtraction
Hardware
Subtraction is closely related to addition.
The basic problem is to compute M N
where M and N are unsigned integers.
Magnitud
Rabin Bastola
Lab8
12/01/2016
Set-Reset Latch
INTRODUCTION
In this lab we are learning about the sequential circuit. In a sequential network, outputs depend on both
the present and past input values. So, some of the information about the past is stored in