Spring 2006
VLSI Design OUTLINE SOLUTIONS to EXAM I
J. Abraham March 1, 2006 Name: ECD, STUDENT 1
1.
a
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Size the transistors in the circuit below so that it has the same drive strength, in the worst case, as an inverter that has PW = 3 and NW = 2
Computer-aided IC Design/VLSI I
(Prof. David Pan) Homework #5 Solution
1. Problem 7.1 from the Exercises for Chapter 7. (a) tpd = 500 - (50 + 65) = 385 ps (b) tpd = 500 - 2(40) = 420 ps (c) tpd = 500 - 40 = 460 ps. 2. Problem 7.2 from the Exercises for Ch
EE360R/EE382M Spring 2005
Introduction to VLSI Design Exam. II Name:
J. A. Abraham April 27, 2005
Class (382M/360R): Open Book, Open Notes. Time Limit: 1 hour, 15 minutes (pace yourself ). Check for 5 pages in exam. Write your work and all your answers in
1 VLSI Design EXAM. II J. Abraham April 12, 2006 Name: Exam, No. 1 Open Book, Open Notes. Time Limit: 75 minutes (pace yourself ). Check for 5 pages in exam.
Spring 2006
Write all your answers in the spaces/boxes provided.
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1 VLSI Design EXAM. I J. Abraham March 1, 2006 Name: Student, A Open Book, Open Notes. Time Limit: 75 minutes (pace yourself ). Check for 5 pages in exam.
Spring 2006
Write all your answers in the spaces/boxes provided.
Show any calculations in these page
Computer-aided IC Design/VLSI I
(Prof. David Pan) Homework #1 Solution
1. a) c b) x + yz c) ab + ac + ad + bc + bd + cd 2. Sketch the transistor-level schematic for a single-stage CMOS logic gate for the function, Y = (AB + C.(A + B)'
3. Implement the log
EE360C: Algorithms
University of Texas at Austin
Dr. Christine Julien
Homework #2
Due: February 2, 2017 (in class quiz)
Homework #2
You should try to solve these problems by yourself. I recommend that you start early and get help
in office hours if needed
Algorithm
Analysis
1/58
Algorithms
EE360C: Algorithms
The Basics
Algorithm
Efficiency
Asymptotic
Notation
Standard
Functions
Christine Julien and Andrea Thomaz
Department of Electrical and Computer Engineering
University of Texas at Austin
Common
Function
EE360C: Algorithms
University of Texas at Austin
Dr. Christine Julien
Homework #1
Due: January 26, 2017 (in class quiz)
Homework #1
You should try to solve these problems by yourself. I recommend that you start early and get help
in office hours if needed
Reading and
Doing Proofs
1/21
Definition
Terminology
EE360C: Algorithms
Proofs
The ForwardBackward
Method
Tools
Truth Tables
Quantifiers
Christin Julien & Andrea Thomaz
Examples
Methodologies
Department of Electrical and Computer Engineering
University of
Discrete Math
1/22
Sets
Set Definitions
Set Operators
EE360C: Algorithms
A Review of Discrete Mathematics
Relations
Functions
Graphs
Types of Graphs
Edges
Paths
Christine Julien/Andrea Thomaz
Connectivity
Isopmorphism
Subgraphs
Special Graphs
Department o
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Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan)
Homework #1: Assigned Jan. 27, due Feb. 3
1.
Minimize the following Boolean equations to eliminate redundancy (a' means the
complement of a).
a) ac + bdc + ca'
b) (x+y)(x+z)
c) a(b+c+d) + b(c+d
Computer-aided IC Design/VLSI I
(Prof. David Pan) Homework #4 Solution
1. Problem 4.19 from the Exercises for Chapter 4 NAND2: g=5/4; NOR2: g=7/4. The inverter has a 3:1 P/N ratio and 4 units of capacitance. The NAND has a 3:2 ratio and 5 units of capacit
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan)
Homework #2: Assigned Feb. 3, due Feb 10 in class
* is for graduate student only
1.
Realize the following functions using CMOS technology with the minimum possible number
of transistors (' is u
Computer-aided IC Design/VLSI I
(Prof. David Pan) Homework #2 Solution
1. (a) F = (A + B) . C) + D)'
(b) F = (X + Y).(X + Z)
(c) F = a.b + a'.c + b.c.d
(d) F = (A + B + C).D.E)'
2. Problem 2.4 from the Exercises for Chapter 2. Cpermicron = L/tox = 3.9*8.8
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan) Homework #3: Assigned Feb. 10, due Feb 17
1. 2. 3. 4. 5. Problem 4.3 from the Exercises for Chapter 4. Problem 4.4 from the Exercises for Chapter 4. Problem 4.10 from the Exercises for Chapter
Computer-aided IC Design/VLSI I
(Prof. David Pan) Homework #3 Solution
1. Problem 4.3 from the Exercises for Chapter 4 The rising delay is (R/2)*(8C)+R*(4C+2C)=10RC and the falling delay is (R/2)*C+R*(2C+4C)=6.5RC. (Note: these are only the parasitic dela
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan) Homework #4: Assigned Feb. 17, due Feb 24
1. 2. 3. 4. 5. 6. Problem 4.19 from the Exercises for Chapter 4. Problem 4.24 from the Exercises for Chapter 4. Problem 4.28 from the Exercises for Cha
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan)
Homework #5: Assigned Mar. 3, due Mar 24, 2010
1.
Problem 7.1 from the Exercises for Chapter 7.
2.
Problem 7.2 from the Exercises for Chapter 7.
3.
Problem 7.3 from the Exercises for Chapter 7.
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan) Homework #6: Assigned Mar. 24, due Mar 31
1. 2. 3. 4. 5. Problem 6.27 from the Exercises for Chapter 6. Problem 6.31 from the Exercises for Chapter 6. Problem 6.32 from the Exercises for Chapte
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan) Homework #6 Solution
1.
Problem 6.27 from the Exercises for Chapter 6.
2.
Problem 6.31 from the Exercises for Chapter 6. The worst case is when A is low on one cycle, B, C, and D are high, and
Computer-aided IC Design/VLSI I
Spring 2010 (Prof. David Pan) Homework #7: Assigned Mar. 31, due Apr 7, 2010
1. 2. 3. 4. 5. 6. Problem 11.1 from the Exercises for Chapter 11. Problem 11.2 from the Exercises for Chapter 11. Problem 11.9 from the Exercises
Computer-aided IC Design/VLSI I Spring 2010 (Prof. David Pan) Homework #7 Solution
1.
Problem 11.1 from the Exercises for Chapter 11. If the array is organized as 128 rows by 128 columns, each column multiplexer must choose among (128/8) = 16 inputs.
2.
P
EE360C: Algorithms
Course Introduction
Christine Julien
Department of Electrical and Computer Engineering
University of Texas at Austin
Spring 2017
W HO AND W HERE AM I?
Course
Introduction
Course
Information
Who Am I?
Other EE360C Section
Coordination of