EE445L
Lecture 7.1
Lecture 7 objectives
digital logic families
input/output voltage/current
PN2222 NPN transistor interface of a speaker
1.4. Digital Logic and Open Collector
I IH
Arrows signify
direction of current
Output
when
high
I IH
IOH
I IL
IOL
Outp
EE445L Fall 2012
Final
Solutions
Page 1
Jonathan W. Valvano
(6) Question 1. First, multiply by a power of 2 and then divide by that same amount. Shifting is much
faster than multiplication and division.
z = (x - 3*y + z)/8
This cannot overflow, because th
EE445L Fall 2011
Final
Version A
Solution
Page 1
Jonathan W. Valvano
(2) Question 1. life long learning
5. to improve the understanding of technology, its application, and consequences;
6. to maintain and improve our technical competence;
(10) Question 2.
EE445L Fall 2010
Final
Version A
Solution
Page 1
Jonathan W. Valvano
(2) Question 1. Add more cfw_energy, power, current, voltage to get more bandwidth.
(6) Question 2. This system has a read-modify-write critical section in main.
(4) Part a) H) Remove th
EE345L Spring 2007
May 12, 2007 Version 2
Solution
Page 1
Jonathan W. Valvano This is the closed book section. You must put your answers in the boxes on this answer page. You have 90 min, so please allocate your time accordingly. Please read the entire ex
EE345L Fall 2009
Final
Version B
Solution
Page 1
Jonathan W. Valvano
(5) Question 1. E) Energy
(4) Problem 2. 17 bytes =
2+2 up to and including MOVB
+2 for BSR in main
+9 from interrupt PC,Y,X,A,B,CCR
+2 for BSR in handler (LowPassFilter is reentered)
(4
EE445L
Lecture 6.1
Lecture 6 objectives
Software latency and real-time systems
Thread synchronization (semaphore, mailbox, FIFO queue)
Edge-triggered interrupts
Software Latency is the time between when the I/O device needs service, and the time when serv
EE445L
Lecture 1.1
EE445L Fall 2012
Lecture 1 objectives
Course description
Definitions
Architecture of the LM3S
Data flow graph
Device Driver
Board support package
Fixed-point
1.1. Embedded Computer Systems
1.1.1. Applications
An embedded computer system
EE445L
Lecture 11.1
Lecture 11 objectives
DAC review
sound amplifier
real time systems
9.4 Digital to Analog Converters
The DAC precision is the number of distinguishable DAC outputs (e.g., 4096 alternatives, 12 bits).
The DAC range is the maximum and min
EE345M Spring 2000
Quiz 2 Solution
Page 1 of 2
Jonathan W. Valvano April 7, 2000, 11:00am-11:50am (20) Question 1. We usually try to divide last. x/100 returns 0, 1, or 2. So (x/100)*49 will be 0, 49, or 98.
y=(49*x+51*y)/100; / compiler will use 16-bit i
EE445M/EE380L.6 Quiz 2 study guide (Spring 2014): 15% Friday April 4, 10-10:50am, in
regular class room
Allowed
Open book, open notes, calculator, paper, pens, and pencils
Not allowed
laptops, phones, devices with screens larger than a TI-89 calculator,
d
EE345M Fall 2001
Quiz 2 Solution
Page 1
Jonathan W. Valvano November 19, 2001, 12:00noon-12:50pm
(25) Question 1. A low-pass FIR digital filter.
unsigned char x[9];
unsigned short sum;
unsigned char filter(unsigned char data)cfw_
x[8]=x[7]; x[7]=x[6]; x[6
EE445L
Lecture 8.1
Lecture 8 objectives
linked data structures in ROM,
Mealy and Moore finite state machines,
fixed time delay using Systick,
adding output pins, adding input pins,
running the FSM in the background using interrupts
Abstraction
Definitions
EE345M Fall 2000
Quiz2 Solution
Page 1
Jonathan W. Valvano November 20, 2000, 11:00am-11:50am (40) Question 1. Implement the following IIR digital filter at 250 Hz. Part a) Show the private global variables required to implement this system.
unsigned char
EE445L
Lecture 10.1
Lecture 10 objectives
SSI interface
74HC244
74HC04
Timing diagrams
DAC
A
Y
A
8
8
OE*
74HC374
Clk
Y
8
OE*
D
Q
8
4.2. Timing
4.2.1. Timing Equations
Figure 4.6. A NOT gate, a tristate driver, and an octal D flip-flop.
Figure 4.7. The dat
EE345M Quiz 2a Jonathan W. Valvano
Fall 2005 Solution November 9, 2005, 1 to 1:50pm
Page 1
(10) Question 1. The CRC is a 15-bit field used to detect transmission errors. (10) Question 2. The ID is 11 bits and the Data fields 32 bits, giving a total of 79
EE345M Quiz 2A Fall 2004 Solution Page 1 Jonathan W. Valvano November 3, 2004, 1 to 1:50pm (30) Question 1. The overall goal is to sample channel 5 of the 10-bit ADC at 1000 samples/sec and output the raw data through the SCI Transmitter without executing
EE345M Spring 2001
Quiz 2 solution
Page 1 of 1
Jonathan W. Valvano April 18, 2001, 9:00am-9:50am (30) Question 1. Battery-backed SRAM interface. Part a) Read Data Available = ( later ( AdV+tAVQV, E1 +t E1LQV) , earlier ( AdN+t AXQX, E1 +t E1HQZ ) ) = ( 60
EE445M/EE380L.6 Quiz 2
Spring 2014
Solution
Jonathan W. Valvano
April 4, 2014, 10:00 to 10:50am
Page 1
(10) Question 1. Consider the following 60-Hz notch IIR filter. Q = fc/f = 60/80 = 0.75
(5) Part a) B is mathematically the same as A. C is the same bec
EE345M Quiz 2 Spring 2009 Solution Page 1 Jonathan W. Valvano April 17, 2009, 10:00 to 10:50am (15) Question 1. A CAN system with 3 nodes has a baud rate of 50,000 bits/sec. Part a) First think about the problem, as it is. 50,000 bps is 20s/bit. The "does