DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #12 This homework is due on Thursday May 1st by 2pm. Homework will be accepted in the EECS150 homework box
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering
Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #11 J. Wawrzynek
1. a) T = 41.66 MHz b)
c) T = 71.4 MHz; L = 26 ns
2. a)
b)
3. ADD:
cycle: regRW X1Sel X1En
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #11 This homework is due on Thursday April 24th by 2pm. Homework will be accepted in the EECS150 homework b
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #9 This homework is due on Thursday April 10th by 2pm. Homework will be accepted in the EECS150 box outside
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #8 Solutions J. Wawrzynek
1.
2.
repeat n times cfw_ repeat n times cfw_ shiftA, selectSum, shiftHI shiftB,
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #5 This homework is due on Thursday February 27th. Homework will be accepted in the EECS150 homework box ou
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley
College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #4 Solutions J. Wawrzynek
1. a)
b)
c)
2. a)
Initial State S0 S0 S0 S0 S1 S1 S1 S1 S2 S2 S2 S2
reset 0 0 1 1
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #4 This homework is due on Thursday February 20th. Homework will be accepted in the EECS150 homework slot i
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #3 This homework is due on Thursday February 13th. Homework will be accepted in the EECS150 homework slot i
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #1 Solutions 1. Problems from Mano's book: 1013. (a) Fourinput NAND CMOS gate J. Wawrzynek
A
B
C
D Y
A
B
DESIGN TECHNIQUES AND COMPONENTS FOR DIGITAL SYSTEMS
ECE 150

Spring 2003
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS150 Spring 2003 Homework #1 This homework is due on Thursday Jan 30th before lecture. Homework will be accepted in the EECS150 homew