Chapter 5: CPU Scheduling
Operating System Concepts 8th Edition
Operating System Concepts 8th Edition
5.1
Silberschatz, Galvin and Gagne 2009
Chapter 5: CPU Scheduling
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Basic Concepts
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Scheduling Cr
Chapter 3: Processes
Operating System Concepts 8th Edition
Operating System Concepts 8th Edition
3.1
Silberschatz, Galvin and Gagne 2009
Chapter 3: Processes
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Process Concept
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Process Scheduling
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Chapter 6: Process Synchronization
Operating System Concepts 8th Edition
Operating System Concepts 8th Edition
6.1
Silberschatz, Galvin and Gagne 2009
Module 6: Process Synchronization
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Chapter 7: Deadlocks
Operating System Concepts 8th Edition
Operating System Concepts 8th Edition
7.1
Silberschatz, Galvin and Gagne 2009
Chapter 7: Deadlocks
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The Deadlock Problem
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System Model
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De
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Paging: Faster Translations (TLBs)
Using paging as the core mechanism to support virtual memory can lead
to high performance overheads. By chopping the address space into small,
xed-sized units (i.
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Paging: Smaller Tables
We now tackle the second problem that paging introduces: page tables
are too big and thus consume too much memory. Lets start out with
a linear page table. As you might recal
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Segmentation
So far we have been putting the entire address space of each process in
memory. With the base and bounds registers, the OS can easily relocate
processes to different parts of physical
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Mechanism: Address Translation
In developing the virtualization of the CPU, we focused on a general
mechanism known as limited direct execution (or LDE). The idea behind LDE is simple: for the most
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Free-Space Management
In this chapter, we take a small detour from our discussion of virtualizing memory to discuss a fundamental aspect of any memory management system, whether it be a malloc libr
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Beyond Physical Memory: Policies
In a virtual memory manager, life is easy when you have a lot of free
memory. A page fault occurs, you nd a free page on the free-page list,
and assign it to the fa
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Beyond Physical Memory: Mechanisms
Thus far, weve assumed that an address space is unrealistically small
and ts into physical memory. In fact, weve been assuming that every
address space of every r
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Summary Dialogue on Memory Virtualization
Student: (Gulps) Wow, that was a lot of material.
Professor: Yes, and?
Student: Well, how am I supposed to remember it all? You know, for the exam?
Profess
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Scheduling: Proportional Share
In this chapter, well examine a different type of scheduler known as a
proportional-share scheduler, also sometimes referred to as a fair-share
scheduler. Proportional
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Scheduling: Introduction
By now low-level mechanisms of running processes (e.g., context switching) should be clear; if they are not, go back a chapter or two, and read the
description of how that s
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Scheduling:
The Multi-Level Feedback Queue
In this chapter, well tackle the problem of developing one of the most
well-known approaches to scheduling, known as the Multi-level Feedback Queue (MLFQ).
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Interlude: Process API
A SIDE : I NTERLUDES
Interludes will cover more practical aspects of systems, including a particular focus on operating system APIs and how to use them. If you dont
like pract
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A Dialogue on Memory Virtualization
Student: So, are we done with virtualization?
Professor: No!
Student: Hey, no reason to get so excited; I was just asking a question. Students
are supposed to do
Exact Algorithms for
NP-Complete Problems
The Traveling
Algorithms: Design Salesman Problem
and Analysis, Part II
The Traveling Salesman Problem
Input: A complete undirected graph with nonnegative edg
Exact Algorithms for
NP-Complete Problems
A Dynamic Programming
Algorithms: Design Algorithm for TSP
and Analysis, Part II
The Subproblems
Moral of last video: To enforce constraint that each vertex v
Exact Algorithms for
NP-Complete Problems
Smarter Search for
Algorithms: Design Vertex Cover
and Analysis, Part II
The Vertex Cover Problem
Given: An undirected graph G = (V , E ).
Goal: Compute a min
Exact Algorithms for
NP-Complete Problems
The Vertex Cover
Algorithms: Design Problem
and Analysis, Part II
The Vertex Cover Problem
Input: An undirected graph G = (V , E ).
Goal: Compute a minimum-ca
Minimum
Spanning Trees
Proof of the Cut
Algorithms: Design
and Analysis, Part II Property
The Cut Property
Assumption: Distinct edge costs.
CUT PROPERTY: Consider an edge e of G . Suppose there is a
c
Minimum
Spanning Trees
Fast Implementation
Algorithms: Design
and Analysis, Part II of Prims Algorithm
Running Time of Prims Algorithm
- Initialize X = cfw_s [s V chosen arbitrarily]
- T = [invariant:
Minimum
Spanning Trees
Correctness of Prims
Algorithms: Design
and Analysis, Part II Algorithm (Part II)
Correctness of Prims Algorithm
Theorem: Prims algorithm always outputs a minimum-cost
spanning
Minimum
Spanning Trees
Correctness of Prims
Algorithms: Design
and Analysis, Part II Algorithm (Part I)
Cuts
Claim: Prims algorithm outputs a spanning tree.
Denition: A cut of a graph G = (V , E ) is
Minimum
Spanning Trees
Algorithms: Design
and Analysis, Part II
Prims MST Algorithm
Example
[Purple edges = minimum spanning tree]
(Compare to Dijkstras shortest-path algorithm)
1
3
2
4
5
Tim Roughgar
Minimum
Spanning Trees
Algorithms: Design
and Analysis, Part II
Problem Denition
Overview
Informal Goal: Connect a bunch of points together as cheaply as
possible.
Applications: Clustering (more later
Greedy Algorithms
A Scheduling Application:
Correctness Proof Part II
Algorithms: Design
and Analysis, Part II
Cost-Benet Analysis, Part I
i >j
more
stu
j
i
stu
more
stu
i
j
stu
exchange i, j
new sch
Greedy Algorithms
A Scheduling Application:
Handling Ties
Algorithms: Design
and Analysis, Part II
Correctness Claim
Claim: Algorithm #2 (order jobs in nonincreasing order of ratio
wj /lj ) is always