ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #1
Solutions
1. Suppose I have a 3-variable function expressed as f = x1 x2 + x3 x1 . Write down
The Canonical SOP expression for f
The
ELEN 248 - Final Exam
Fall 2006
Instructor: Sunil P Khatri
Wednesday, December 13, 2006
NAME:
Important Note: For all your answers, provide the reasoning process that you followed to arrive at your
answer. If you provide an answer which is correct, but do
ELEN 248 - Midterm 1
Fall 2006
Instructor: Sunil P Khatri
Solutions
NAME: Albert Einstein
Problem Maximum points Your points
Problem 1
30
30
Problem 2
35
35
Problem 3
35
35
Total
100
100
1
Solutions to Midterm #1
2
1. Consider the K-map of a function f ,
ELEN 248 - Final Exam
Fall 2006
Instructor: Sunil P Khatri
Wednesday, December 13, 2006
NAME:
Important Note: For all your answers, provide the reasoning process that you followed to arrive at your
answer. If you provide an answer which is correct, but do
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #10
Solutions
1. Suppose I want to build a counter which counts from 0 up to 4 (skipping the value 2). When the
count reaches 4, my counte
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #9
Solutions
1. Suppose I have a SOP expression for a funciton f on n-variables, x1 , x2 , xn . Assume that there
are k cubes in the expre
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #8
Solutions
1. Consider a function f = ab + bc.
(a) Write down the recursive Shannon expansion of this function, by using the cofactoring
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #7
Due Thursday, November 6, 2009
1. [30 points.]
Suppose I want to design a binary multiplier which multiplies an 8 bit number by a 6 bit
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #6
Due Thursday, October 29, 2009
1. [20 points.] Consider the always block below:
always @ (posedge CLK) begin
a = #4 1;
b = #2 1;
a = #2
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #5
Due Thursday, October 22, 2009
1. [15 points.]
Consider an output pin of a computer chip A. It is connected to a wire on the printed ci
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #4
Due Thursday, October 8, 2009
1. [25 points.] Check the online solution for HW2, Question 1 (c). Write a structural Verilog netlist for
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #3
Solutions
1. Suppose that a k-input gate has a delay of k seconds, and an area of k units. This data is valid for
AND, OR, NAND, NOR ga
ECEN 248: Introduction to Digital System Design
Department of Electrical Engineering
Texas A&M University
Assignment #2
Solutions
1. I want to schedule a meeting among 6 individuals Alice, Brian, Charles, David, Elise and Frank. The
meeting must be schedu
Part I: Objective Questions
Section A: True/False (30 Points Total)
Read each of the following statements carefully. If the entire statement is true, circle T,
otherwise circle F. Each correct response is worth two points.
T
F 1. Verilog is case sensitive