ECEN720 High-speed Link Systems & Circuits
Prelab 1 Solution
1. Please work out the waveforms using Lattice Diagram for the terminated transmission
line as shown in Figure 8. Assuming the delay time of the transmission line is 2ns and the
input source is
Prof. Sam Palermo ECEN 720 Exam #2 April 24, 2013
Texas A&M University
Department of Electrical and Computer Engineering
ECEN 720 High-Speed Links
Spring 2013
Exam #2
Instructor: Sam Palermo
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ECEN720 High-speed Links Circuits and Systems
Prelab 4 -solution
1.
Solution:
The yield rate for : 34.1%*2=68.2%
The yield rate for 2: (34.1%+13.6%)*2=95.4%
The yield rate for 3: (34.1%+13.6%+2.1%)*2=99.6%
The yield rate for 4: (34.1%+13.6%+2.1%+0.1%)*2=9
ECEN 720 High-Speed Links
PRELAB #3 - Solution
Alex K. TITRIKU
Question 1
(a)
Using the 90nm CMOS process, both NMOS and PMOS transistors were characterized using
dimensions W/L = 2um/100nm. Below are the plots of transition frequency (fT) versus Vgs
and
ECEN 689
High-Speed Links Circuits and Systems
Lab 2 Solution
Pre-Lab 2
1. Please plot S11 and S21 for the circuit shown in Figura 11 using Cadence. RT=50.
a. Td=0ps (no t-line), C1=0pF, L1=0nH, C2=1pF
b. Td=0ps (no t-line), C1=1pF, L1=2nH, C2=2pF
c. Td=1
Prof. Sam Palermo
ECEN 689 Exam #1
Texas A&M University
March 7, 2012
Department of Electrical and Computer Engineering
ECEN 689 High-Speed Links
Spring 2012
Exam #1
Instructor: Sam Palermo
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Prof. Sam Palermo ECEN 689 Exam #1 March 12, 2010
Texas A&M University
Department of Electrical and Computer Engineering
ECEN 689 High-Speed Links
Spring 2010
Exam #1
Instructor: Sam Palermo
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