ECEn/CS 224 Chapter 11 Homework Solutions
11.1 Below is a timing diagram for the SR latch of Figure 11.1. Fill in the output waveform. Reflect approximate timing. See section 11.7 to remind you what is meant by approximate timing.
Figure 11.1: SR Latch
ECEn/CS 224 Cascaded Counter Homework Solutions
1. Create a 6-bit binary counter from two 3-bit counter modules. Assume that the 3-bit counter has the following inputs and outputs: enable (when enable=1 the counter increments, when enable = 0, the counter
ECEn/CS 224 Chapter 15 Homework Solutions
15.1 Draw the state graph and corresponding transition table for a 3-bit counter with no control inputs and which counts in multiples of 3. That is, the count sequence is: 000 011 - 110 - 000. Use don't cares in t
ECEn 324 Winter 2010 Midterm #1 Solution
1. a. b. c. d. Which of the following was NOT suggested by the text as a reason for the success of C? C was closely tied with Unix. C is small and simple. C was designed by an ANSI standard committee. C was designe
ECEn 324 Practice Exam: Midterm #2
1. a. b. c. d. In which of the following ways does the Y86 ISA differ from the x86 ISA? The Y86 has no condition codes. The Y86 has no stack-based instructions. No Y86 instruction accesses data memory twice. The Y86 has
ECEn/CS 224 Chapter 16 Homework Solutions
16.1 Draw the state graph for a car wash controller which has 3 different kinds of washes - a simple rinse-only wash, a rinse-soap-rinse wash, and a rinse-soap-rinse-blow dry wash. The first two of these wash type
ECEn/CS 224 Chapter 13 Homework Solutions
13.1 If one desires to count to M, what is the minimum number of bits required in the resulting counter? The maximum number, M, that can be represented by K bits is 2K-1. In other words, a minimum of K bits are re
ECEn/CS 224 Appendix B Homework Solutions
B.1 Implement a 4:1 MUX using a single dataflow assignment statement involving only concatenation, replication, and the operators for AND, OR, and NOT.
module mux41(out, in0, in1, in2, in3, sel); input in0, in1, i
ECEn/CS 224 Chapter 10 Homework Solutions
10.1 The figure below is a detailed timing diagram for a NAND-like gate. If you were interested in knowing how fast this gate would run for purposes of critical path analysis, what would you use for tprop ? Why?
ECEn/CS 224 Chapter 6 Homework Solutions
Implement the schematic for Figure 5.2(a) using only NOR gates. A
B F A C
Implement the schematic for Figure 5.2(a) using only NAND gates. A B
F A C
Last updated: 10/1/2006
Assume you h
ECEn/CS 224 Chapter 12 Homework Solutions
12.1 Design a 4-bit shift register with the following functionality: shift-left, shift-right, clear, load-all-1s. Use a 2-bit control input to select between these options (00=shift-left, 01=shift-right, 10=clear,
ECEn 324 Practice Exam: Midterm #1
1. a. b. c. d. Which of the following was developed as part of the GNU project? The C programming language The GCC compiler The Linux operating system The Unix operating system
2. Which of the following statements is fal
ECEn 324 Winter 2010 Midterm #2 Solution
1. a. b. c. d. Which of the following is NOT true of the Y86 ISA? Target addresses for jump instructions are represented as absolute addresses in 4 bytes. Instructions with explicit register operands can be as shor
Computer Systems A Programmers Perspective 1 (Beta Draft)
Randal E. Bryant David R. OHallaron November 16, 2001
c Copyright 2001, R. E. Bryant, D. R. OHallaron. All rights reserved.
Preface 1 Introduction 1.1 1.2 1.3 1.4 Information is Bits i
ECEn/CS 224 UART Homework Solutions
1. Draw a serial waveform of the character 'B' (ASCII for 'B') being transmitted over the UART using even parity. Be sure to include the Start bit, 7 data bits, parity bit, and a single stop bit.
B = 22 hex Start
ECEn/CS 224 ALU Homework Solutions
In the LC-3 there is an ALU which performs the functions PASS, ADD, AND, NOT. The last three should be self-explanatory. The PASS function simply passes the first input through to the output. Assuming inputs A
ECEn/CS 224 Chapter 3 Homework Solutions
3.1 Draw the truth table for a 3-variable function whose output is TRUE any time an odd number of its nputs is TRUE. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 0 1 1 0 1 0 0 1
Draw the truth table
ECEn/CS 224 Chapter 4 Homework Solutions
4.1 Create an inverter (NOT gate) using a single 2-input NAND gate.
Create and AND gate using only NOR gates.
Draw the gate-level schematic for this equation: F = (AB' + A'B)'.
ECEn/CS 224 Chapter 5 Homework Solutions
5.1 Write the minterm expansion for the function shown in Figure 5.10.
For the minterm expansion, look at where the ones appear in the table and list the terms: F(A,B,C) = m(0,1,3,5,6) 5.2 Write the maxterm expansi
ECEn/CS 224 Chapter 7 Homework Solutions
7.1 Using a KMap, prove the SOP form of the consensus theorem (see section 3.5.5). Does the KMap help illustrate why the third term is redundant? The consensus theorem is: AC + AB + BC = AC + AB
A BC 0 00 01 11 1 1
ECEn/CS 224 Chapter 8 Homework Solutions
8.1. Convert the following to unsigned binary, add the numbers together in binary, and check your result by converting it back to base-10: 4 + 5 =?. Use four bits for your operands and result. 0100 + 0101 -1001 4 +
ECEn/CS 224 Chapter 9 Homework Solutions
9.1 Implement an 8:1 MUX out of 4:1 MUX blocks. One example is shown below. Other solutions are possible.
In0 In1 In2 In3
I0 I1 I2 I3
out I0 I1 I2 I3
sel S1 S0
In4 In5 In6 In7
I0 I1 I2 I3
sel out S2 S2
ECEn/CS 224 Chapter 17 Homework Solutions
17.1 Design the FSM of Figure 16.5 using a one-hot encoding and reduce the design to gates. Recall that with the one-hot encoding we can easily design the FSM directly from the state diagram, without resorting to
ECEn/CS 224 Chapter 18 Homework Solutions
18.1 Plot the following function on a KMap and identify a minimum POS solution for it. Then, solve it a second time using hazard-free minimization. Show your work. F(A,B,C,D) = m0 + m1 + m2 + m4 + m5 + m6 + m9 + m
ECEn/CS 224 LC-3 Control Homework Solutions
1. Create a transition table for the states of the LC3 processor. Your transition table should include the fetch0, fetch1, fetch2, decode states as well as any states necessary to support the following instructi