HARDWARE LAB 2
Designing BCD-to-seven-segment decoder
Digital Design: CPEN214
NAME_
A BCD-to-seven-segment decoder is a combinational circuit that converts a decimal digit in BCD
to an appropriate code for the selection of segments in a display indicator

HARDWARE LAB 1
Combinational Design
Digital Design: CPEN214
NAME_
Introduction
The purpose of this experiment is to introduce you to the basics of digital design, wiring
and testing logic circuits. In this lab, you will connect several logic gates to crea

Electrical Fundamentals
We need some understanding of electrical fundamentals to
do the lab exercises.
Electric Circuit Consists of:
Power Source: Battery, Power Supply (DC or AC)
Wires: usually conductors used to connect various
electric circuit elemen

Boolean Algebra
4 Why study Boolean Algebra?
It is highly desirable to find the simplest circuit
implementation with the smallest number of gates or
wires.
We can use Boolean minimization process to reduce a
Boolean function (expression) to its simplest f

HARDWARE LAB 3
Designing 3-Bit Synchronous Counter Using Flip-Flops
NAME_
A digital counter is a device that generates binary numbers in a specified count sequence. The
counter progresses through the specified sequence of numbers when triggered by an inco

Synchronous Sequential Logic
A digital system has combinational logic as well as sequential
logic. The latter includes storage elements.
feedback path
The binary information stored in the memory elements at any
given time defines the state of the sequent

1
CPEN214/Fall2012/Gerousis
CPEN 214 - Digital Logic Design
Fall 2012
Instructor: Dr. C. Gerousis
Office Phone: 594-7603 Department Office: 594-7065
Office: Gosnold Hall, Room 224
Email: gerousis@cnu.edu
Office Hours: I will be available in my office for

Design Problem
Design a 4-bit incrementer; a circuit that increments a 4bit # (A3, A2, A1, A0) by one using 4 1-bit adders.
Carry Propagation 1
Addition of two numbers in parallel implies that all bits are available
for computation.
Total propagation dela

D Flip-Flop Example
Design a sequential circuit with one D flip-flop, two inputs J and K,
and external gates. The circuit operation is specified by the following
table:
J
K
Operation
0
0
Q (next clock edge leaves the output unchanged)
0
1
0 (next clock e

COMBINATIONAL CIRCUITS
1. Combinational
LOGIC CIRCUITS:
2. Sequential
Combinational logic circuits (circuits without a memory):
Combinational switching networks whose outputs depend only
on the current inputs.
Sequential logic circuits (circuits with memo

State Reduction (1)
Goal: reduce the number of states while keeping the external
input-output requirements unchanged.
State reduction example:
a: input 0 output 0, circuit stays in same state a
a: input 1 output 0, circuit goes to state b
b: input 0 outpu