Homework 3
4.30) The wire width is 1.2 m so the wire is 5000 m/1.2 m = 4167 squares in length.
The total resistance is (0.08 /sq)(4167 sq) = 333 . The total capacitance is (0.2
fF/ m)(5000 m) = 1 pF.
4.32) R = 0.05*l/W; C = l*C(W, S); W + S = 1000 nm. C(W
Practice Exam: Midterm, EE466
1. (a) Suppose VDD=1.2V and Vt=0.4V. Determine Vout for the pass transistor circuit for
Vin=0V, 0.6V, 0.9V and 1. 2V. Neglect body effect.
VDD
Vin
Vout
(b) What is the intended function of the circuit shown below? What is the
Solutions to Practice Exam: Midterm, EE466
1 (a). (a) 0; (b) 0.6; (c) 0.8; (d) 0.8 Notice that when the gate source voltage is less than the Vt, the sourcedrain is swapped to make the output side the source with a Vt drop.
(b) Circuit
is a buffer with deg
Homework 4 Solutions
10.2) Overflow for signed numbers only occurs when adding numbers with the same sign
(positive or negative). The numbers overflow (V) if the sign of the result Y does not
match the sign of the inputs A and B:
V = AN 1 B N 1Y N 1 + A N
EE466: VLSI Design
Midterm
October 14, 2009
Please answer all 4 Questions with proper justification
1 (a) In the following circuit find out the voltage across the output capacitor, Vout after
the circuit reaches steady state when (i) Vin = 1V and (ii) Vin
Solutions to Practice Exam: Midterm, EE466
1 (a). (a) 0; (b) 0.6; (c) 0.8; (d) 0.8 Notice that when the gate source voltage is less than the Vt, the sourcedrain is swapped to make the output side the source with a Vt drop.
(b) Circuit
is a buffer with deg
Practice Exam: Midterm, EE466
1. (a) Suppose VDD=1.2V and Vt=0.4V. Determine Vout for the pass transistor circuit for
Vin=0V, 0.6V, 0.9V and 1. 2V. Neglect body effect.
VDD
Vin
Vout
(b) What is the intended function of the circuit shown below? What is the
Homework 3
4.30) The wire width is 1.2 m so the wire is 5000 m/1.2 m = 4167 squares in length.
The total resistance is (0.08 /sq)(4167 sq) = 333 . The total capacitance is (0.2
fF/ m)(5000 m) = 1 pF.
4.32) R = 0.05*l/W; C = l*C(W, S); W + S = 1000 nm. C(W
Homework 4 Solutions
10.2) Overflow for signed numbers only occurs when adding numbers with the same sign
(positive or negative). The numbers overflow (V) if the sign of the result Y does not
match the sign of the inputs A and B:
V = AN 1 B N 1Y N 1 + A N