7. A RISC processor has 186 total registers, with 18 globals. There are 12 register win-
dows, each with 10 locals. How many input/output registers are in each register window?
8. Suppose a RISC machine uses overlapping register windows for passing parame
ORGANIZATION STRATEGY AND PROJECT SELECTION
1. The Strategic Management Process: An Overview
A. Four Activities of the Strategic Management Process
2. The Need for a Project Portfolio Management System
A. Problem 1: The Implement
27. Do neural networks process information sequentially? Explain.
28. Compare and contrast supervised learning and unsupervised learning with regard to
29. Describe the process of supervised learning in neural networks from a mathematic
8. How is a superscalar design different from a superpipelined design?
9. In what way does a VLIW design differ from a superpipelined design?
10. What are the similarities and differences between EPIC and VLIW?
11. Explain the limitation inherent in a reg
FIGURE 9.14 a. A Simple Processing Element (PE)
b. A Systolic Array Processor
FIGURE 9.15 Using a Systolic Array to Evaluate a Polynomial
A good example of using systolic arr
Patterson, D. & Ditzel, D. The Case for the Reduced Instruction Set Computer. ACM SIGARCH
Computer Architecture News, October 1980, pp. 2533.
Patterson, D. A., & Hennessy, J. L. Computer Organization and Design: The Hardware/Software
Interface, 2nd ed. Sa
Flynns taxonomy categorizes architectures depending on the number of
instructions and data streams. MIMD machines should be further divided into
those that use shared memory and those that do not.
The power of todays digital computers is truly astounding.
input weights until the correct output was reached. Following the training period,
the 50 secret pictures from each group of photos were fed into the network. The
neural network correctly identified the presence or absence of a tank in each photo.
Bell, G. The Future of High Performance Computers in Science and Engineering, Communications of the ACM. Vol. 32, pp. 10911101, 1989.
Bhuyan, L., Yang, Q., and Agrawal, D. Performance of Multiprocessor Interconnection Networks.
Computer, 22:2, 1989, pp. 2
18. Describe briefly and compare the VLIW and superscalar models with respect to
19. Which model, VLIW or superscalar, presents the greater challenge for compilers?
20. Compare and contrast the superscalar architecture
THE BASIC COMPUTER PERFORMANCE EQUATION
You have seen the basic computer performance equation several times in previous
chapters. This equation, which is fundamental to measuring computer performance, measures the CPU time:
performance. Keep these ideas in mind as you read the discussions on improving
performance. We begin with a discussion of the various measures of overall system performance, and then describe factors relating to the performance of individual system compon
These formulas are useful in comparing the average performance of one system
with the average performance of another. However, the number that we end up
with is as much dependent on our definition of average as it is on the actual
performance of the syste
of the system. If we have some indication of how frequently each of the five programs are run during the daily processing on these systems, we can use the execution mix to calculate relative expected performance for each of the systems.
The weighted avera
TABLE 10.3 The Weighted Average Running Times for System A Using
a Revised Execution Mix
are certain to be at a loss to explain why
The geometric mean bears out our intuition concerning the relative performance of System A and System C. By taking the ratios of their geometric means,
we see that System A gives a much poorer result than System B. However, the
geometric mean is not linea
Execution Normalized Execution Normalized Execution Normalized
as a Rate
Indicator of System
a Known Workload
TABLE 10.6 Data Characteristics and Suita
he two quotations with which we introduce this chapter highlight the dilemma
Tof computer performance evaluation. One must have quantitative tools with
which to gauge performance, but how c
which are fed to the neural net during the training phase. While it is learning, the
neural net is told whether its final state is correct. If the output is incorrect, the
network modifies input weights to produce the desired results. Unsupervised
putation involved is deceptively easy; the true power of a neural network comes
from the parallel processing of the interconnected PEs and the adaptive nature of
the sets of weights. The difficulties in creating neural networks lie in determining
FIGURE 9.12 Data Flow Graph Corresponding to the Program to
The corresponding data flow graph is shown in Figure 9.12. The two values, N
and 1, are fed into the graph. N becomes token j. W
Static Network Topologies
a. Completely Connected
c. Linear and Ring
d. Mesh and Mesh Ring
f. Three-Dimensional Hypercube
Dynamic networks allow for dynamic configuration of the network in one of
two ways: eith
one aspect of superscalar design, and for this reason, there is often confusion
regarding which is which.
So, what exactly is a superscalar processor? We know that the Pentium
processor is superscalar, but have yet to discuss what this really means. Super
However, on a vector processor, this code becomes
;load vector1 into vector register R1
;store vector register R3 in vector V3
Vector registers are specialized registers that can hold several vector element
As a VLIW compiler creates very long instructions, it also arbitrates all
dependencies. The instructions, which are fixed at compile time, typically contain
four to eight instructions. Because the instructions are fixed, any modification
that could affect
isnt amenable to a parallel solution, generally it is not cost effective to port it to a
multiprocessing parallel architecture.
Implemented correctly, parallelism results in higher throughput, better fault
tolerance, and a more attractive price/performanc
the components are interconnected, is a major determining factor in the overhead
cost of message passing. Message passing efficiency is limited by:
BandwidthThe information carrying capacity of the network.
Message latencyThe time required for the first
FIGURE 9.2 A Taxonomy of Computer Architectures
refer to it as you read the sections that follow. We begin on the left
A network of workstations (NOW) is a collection of distributed workstations
that works in parallel only while the nodes are not being used as regular workstations. NOWs typically consist of heterogeneous systems, with different processors and software, th