Problem 1)
a) Draw the multiple-level NOR circuit for the following logic diagram, then find the
simplified Boolean expression for Y. (10 points)
Solution
A
B
X
C
D
Y
(5 POINTS)
Each mistake will result in -1 points.
Y = A + B +C
(5 points)
If your answer
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 4 1- Reduce the following expressions to a minimum sum of products form, using the postulates and theorems. Show t
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 5 (Due Sat. Oct. 23) 1- For the following functions, (i) List all prime implicants, indicating which are essential
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 6 1- Using algebraic manipulations, obtain a logic diagram consisting of only NAND-gates for each of the following
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 7 (Due Nov. 29) 1- Design a full subtractor, that is, a circuit which computes a b c , where c is the borrow from
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 8 (Due Dec. 11) Problems 4.28, 4.29, 4.34, 4.35, 7.19, 7.22, 7.24 From your book
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 9 Problems 5-4, 5-6, 5-12, 5-17, 5-18, 5-19 and 5-20 From your book
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 10 Problems 6-2, 6-6, 6-7, 6-10, 6-20, 6-25, 6-26, 6-27, 6-29, and 6-30 From your book
Number Systems & Complements
The material covered in this class will be as follows:
Conversion between binary, octal & hexadecimal numbers. Binary arithmetic. Introduction to complements.
After finishing this class, you should be able to:
Convert numbers
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 2-1
The material covered in this class will be as follows:
Complements Subtraction using complements.
Decimal number complements: 9s complement of the decimal number N = (10 1) N = n (9s) N i.e. cfw_s
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 2-3
The material covered in this class will be as follows:
Signed binary numbers Addition and Subtraction of Signed binary numbers.
Signed Binary Numbers: Unsigned binary numbers n bit binary number S
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 3-1
The material covered in this class will be as follows:
Binary codes, BCD code, BCD addition Other decimal codes Gray code Error-detecting code (parity bit) Alpha-numeric codes, ASCII code
Binary c
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 3-2
The material covered in this class will be as follows:
Binary logic Switching circuits Binary signals Basic logic gates
Binary Logic: Binary logic deals with variables e.g. x, y, z, A, B, C, etc.,
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 3-3
The material covered in this class will be as follows:
Boolean Algebra Postulates Two-valued Boolean Algebra Basic Theorems and Properties Venn Diagrams
Boolean Algebra: It is defined with a set o
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 3-4
The material covered in this class will be as follows:
Boolean functions Algebraic manipulation Complement of a function Canonical and standard forms
Boolean Functions The following Boolean functi
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 4-3
The material covered in this class will be as follows:
Digital logic gates Extension to multiple inputs Positive and negative logic Integrated circuits
Digital Logic Gates Commonly used digital lo
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 5-1
The material covered in this class will be as follows:
Canonical forms Sum of minterms Product of maxterms
Conversion between the different forms Standard Forms Sum of products (SOP) Product of su
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 5-3
The material covered in this class will be as follows:
Simplification of Boolean functions using Karnaugh maps Two, three, and four Karnaugh maps.
Karnaugh Map The map is a diagram mad up of squar
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 3 (Due Sat. Oct. 9) 1. For each of the truth tables shown below, write the corresponding minterm canonical formula
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 2 (Due Sat. Oct. 2) 1- Show a truth table for the following functions: a- F = X Y + Y Z + X Y Z . b- G = X Y + ( X
King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE 200 Digital Logic Circuit Design Dr. H. Ragheb HW No. 1 (Due Sat. Sept. 25) 1- Convert the following to i- octal a. (111010110111)2
ii- hexadecimal b. (611)10 b. (1C3)1
King Fahd University of
Petroleum and Minerals
Department of Electrical Engineering
EE 200 Digital Logic Circuit Design
Exam 2
Tuesday, 27 Nov 2012
5:30 pm 7:00 pm (90 min)
Name:
ID:
Section:
Course Instructors
Mr. SOHAIL
Dr. QURESHI
Dr. HUSSEIN
Dr. ALGHA
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 13-1
The material covered in this class will be as follows:
State reduction. State assignment. Design procedure. Flip-flop excitation tables.
State reduction In the design of sequential circuits, we n
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 13-2
The material covered in this class will be as follows:
Design of a sequence detector. Synthesis using D flip-flops. Synthesis using JK flip-flops. Design of a binary counter using T flip-flop.
De
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 14-2&3
The material covered in this class will be as follows:
Universal shift register. Ripple counters. Binary ripple counter. BCD (Decimal) ripple counter.
Universal Shift Register Registers are ava
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 15-1
The material covered in this class will be as follows:
Synchronous counters. Binary counter. Up-down counter. BCD counter. Binary counter with parallel load.
Synchronous Counters Synchronous counte
EE200 DIGITAL LOGIC CIRCUIT DESIGN
Class Notes CLASS 10-3
The material covered in this class will be as follows:
Sequential Circuits. Basic flip-flops (Latches). SR latch with control input. D latch
Sequential Circuits The digital circuits studied so fa