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ENSC150 Lecture 22 Agenda
Mealy and Moore Sequential circuits
Lecture 22
Atousa Hajshirmohammadi, SFU
Mealy Circuit
When the output of a sequential circuit depends on the state as well
as the input to the circuit, we use a Mealy state diagram. In th
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ENSC150 Lecture 21 Agenda
More Sequential Design Binary Counter with Load Option BCD Counter
Lecture 21
Atousa Hajshirmohammadi, SFU
Counter w/ Load
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We want to add to the binary counter developed in Lecture 19 the capability to load the counter w
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ENSC150 Lecture 20 Agenda
Other Flip Flop Types JK Flip Flop T Flip Flop
Lecture 20
Atousa Hajshirmohammadi, SFU
JK Flip Flop
In addition to its clock pulse, this ip op has two inputs; J and K
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The J input acts as the set and the K input acts as
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ENSC150 Lecture 19 Agenda
Registers Parallel Registers Shift Registers Counters
Lecture 19
Atousa Hajshirmohammadi, SFU
Registers
Registers are simply a set of ip-ops used to store a number of
binary bits. A set of n ip-ops can store bits.
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1-bi
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ENSC150 Lecture 18 Agenda
Sequential Circuit Design
Lecture 18
Atousa Hajshirmohammadi, SFU
Design Steps
Specication: Often given by the User Formulation: Find the State diagram and State table Input equations: Find the equations of the input(s) to
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ENSC150 Lecture 17 Agenda
Sequential Circuit Analysis Equations (Input, Output) State Table State Diagram Simulation
Lecture 17
Atousa Hajshirmohammadi, SFU
Introduction
A digital Sequential Circuit is one that consists of one or more
Latches or Fli
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ENSC150 Lecture 16 Agenda
D-Flip Flop
Lecture 16
Atousa Hajshirmohammadi, SFU
D-Flip Flop
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A circuit that its output can change between the values of 0 and 1
only at the edge of its clock pulse.
Structure
Q
D D-Latch D D-Latch
Q
clk
C
C
Q
Lectu
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ENSC150 Lecture 15 Agenda
Latches SR-Latch S R-Latch Latch with Control D-Latch
Lecture 15
Atousa Hajshirmohammadi, SFU
SR-Latch
Latches are another type of digital storage device. Circuit of an SR-Latch:
R(Reset)
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Q
Q
S(Set)
Set state: S=1, R=
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ENSC150 Lecture 14 Agenda
Storage Elements (Buffers) Propagation Delay
Lecture 14
Atousa Hajshirmohammadi, SFU
Buffer
Buffer is the most basic storage element. Buffer is a gate that does nothing to the input!
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Propagation delay: Gates in general
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ENSC150 Lecture 13 Agenda
Signed Binary Numbers Subtractors (Cont.)
Lecture 13
Atousa Hajshirmohammadi, SFU
Negative Numbers
So far we have mostly dealt with positive (unsigned) numbers. The only time we considered negative numbers was when the resu
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ENSC150 Lecture 12 Agenda
Adders (review) Subtractors
Lecture 12
Atousa Hajshirmohammadi, SFU
Adders
We have seen this before and know that the result is: + X Y = X L Y , Cout = XY S = XY
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Half Adder: Generates the sum of 2 binary bits X and Y to
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ENSC150 Lecture 11 Agenda
Implementing functions using Multiplexers
Lecture 11
Atousa Hajshirmohammadi, SFU
Value Fixing
Recall; Implementing a function using a decoder and value xing:
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The above circuit is simply a MUX with the values of the inpu
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ENSC150 Lecture 10 Agenda
Encoders Priority Encoders Multiplexers
Lecture 10
Atousa Hajshirmohammadi, SFU
Encoders
Encoder performs the reverse operation of a decoder. Usually has 2n inputs and n outputs. one and only one input line should be 1 at
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ENSC150 Lecture 9 Agenda
Decoders Using Decoders to implement functions Using Decoders and Value Fixing to implement functions
Lecture 9
Atousa Hajshirmohammadi, SFU
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Decoders
Consider two binary variables A and B. How many possible
combinati
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ENSC150 Lecture 7 Agenda
Three steps of Design Procedure Optimization of 4-Variable Functions Using K-Map Dont Care Condition
Lecture 7
Atousa Hajshirmohammadi, SFU
Introduction
Recall the Design procedure: Specication: This is usually given to you.
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ENSC150 Lecture 5 Agenda
Minterms Maxterms Using minterms and maxterms to write the Boolean equation of a
function from its Truth Table
Lecture 5
Atousa Hajshirmohammadi
Min and Max Terms
Minterm: The product term corresponding to each row of the in
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ENSC150 Lecture 4 Agenda
Construction of Sum of Products(SOP) form from the Truth Table
(TT)
Changing the function from Sum of Products to Product of Sums
(POS)
Atousa Hajshirmohammadi, SFU
From TT to SOP
Assume that instead of the Boolean equation
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ENSC150 Lecture 3 Agenda
Standard Forms of Boolean Functions: Sum of Product Product of Sum
Atousa Hajshirmohammadi, SFU
Lecture 3
Boolean Function
A Boolean function is an equation with binary variables and Boolean
(logic) operations.
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Examples
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ENSC150 Lecture 2 Agenda
Binary logic Representation of binary logic functions Identities ruling binary logic operations Using these identities to simplify binary functions
Atousa Hajshirmohammadi, SFU
Lecture 2
Introduction
A general system (devic
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ENSC150 Lecture 1 Agenda
Number Systems: Conversion Focus on Binary, Octal, and Hexadecimal Some Coding Techniques
Atousa Hajshirmohammadi, SFU
Lecture 1
Numbers
A bit of history:
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Origins of the science of mathematics have been traced back to
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ENSC150 Lecture 0
Welcome to ENSC-150 Introduction to Computer Design
Atousa Hajshirmohammadi, SFU
Lecture 0
Instructor
My name is Atousa Hajshirmohammadi Technical background:
High School Diploma in Math-Physics BSc in ECE MSc in Digital Comm. PhD i