Chapter 6 (Lect 3)
Counters Continued
Unused States
Ring counter
Implementing with Registers
Implementing with Counter and Decoder
Sequential Logic and Unused States
Not all states need to be used
Can
Chapter 6 (Lect 2)
Ripple Counters
Binary counter
BCD counter
Synchronous Counters
Binary counter
updown counter
Parallel Load counter
Counter: Registers that go through a predefined set of states
as
Chapter 6 (Lect 1)
Registers
Definitions
Parallel Load
Shift Register (Serial Load)
Universal Shift Register
Serial adders
Circuits that include flipflops are typically describe by their function and
Chapter 5 (Lect 3)
State Reduction
Design (Synthesis) Procedures
D flipflops
JK flipflops
T flipflops
State Reduction: The goal is to finds ways to reduce the number of states, without
altering the
Chapter 5 (Lect 2)
Analysis of Synchronous Circuits
State Equations
State Tables
State Diagrams
Technique for D, JK, and T flipflops
Finite State Machines
Introduction and goals:
The behavior of a cl
Chapter 4 (Lect 4)
Encoders
Multiplexers
ThreeState Gates
More Verilog
Encoder: an encoder is the inverse of a decoder, it has 2n or
fewer input lines and n output lines
Recall: 2 4 line decoder
Inpu
Chapter 4 (Lect 3)
Binary Multiplier
Magnitude Comparator
Decoders
Binary Multiplication
X
1
1
1
1
0
1
Binary Multiplier
X
A2
B2
A1
B1
A0
B0

A 2B 2
A 2B 1
A 1B 2
A 2B 0 A 1B 0 A 0B 0
A 1B 1 A 0B 1
A
Chapter 4 (Lect 2)
Adders
Carry propagation
Subtraction
Overflow
Timing and Carry propagation: Standard 4bit ripple adder
B3 A3
B2 A2
C3
C4
S3
When are the inputs applied
When are the correct outputs
Chapter 4 (Lect 1)
Combinational Circuits
Analysis
Design
Half and Full Adders
Combinational Circuit: A circuit whose outputs at any time are determined
solely on the state of current inputs.
Combinat
Chapter 3 (Lect 3)
GateLevel Minimization
NAND and NOR Implementation
NAND Circuits
NOR Circuits
XOR and Parity Checking
In most cases digital circuits are constructed using NAND and
NOR gates rather
Chapter 3 (Lect 2)
GateLevel Minimization
KMaps (sumofproducts)
Two Variable
Three Variable
Four Variable
Five Variable
KMaps (productofsums)
Dont Care Conditions
Karnaugh or Kmaps: Is a diagr
Chapter 2 (Lect 2)
Canonical and Standard Forms
Sum of Minterms
Product of Maxterms
Standard Form
Sum of products
Product of sums
Other Logic Operators
Logic Gates
Basic and Multiple Inputs
Positive a
Chapter 2 (Lect 1)
Boolean Algebra
Introduction
TwoValued Boolean Algebra
Elements and Operators
Postulates and Theorems
Boolean Functions
Truth Tables
Circuits
Application
Canonical and Standard For
Chapter 1 (Lect 2)
Binary Codes
BCD
Gray
ASCII
Digital Storage and Registers
Binary Logic
Definitions
Truth Table
Gates
Binary Codes
Code consisting of 1 and 0, high and low, on and off, two distinct
Chapter 1 (Lect1)
Working with Binary, Octal, and Hexadecimal numbers
Review
Bases
Conversions
Addition and subtraction
Number complements
Signed and Unsigned representations (Base 2)
Addition and Sub