Master-Slave D Flip-Flop
Master
D
D
Q
Clk Q
Clock
Slave
Qm
D
Q
Clk Q
Qs
Master tracks D input
Slave does not change
Q
Q
Clock=1
D
Qm
Q = Qs
Clock=0
Clock
Master does not change
Slave passes Qm to Q
Effectively, output changes
only at the clock edge, i
Another example
One more example
16-to-1 multiplexer
use several 4-to-1 mux
s0
s1
w0
ENTITY mux4to1 IS
PORT (w0, w1, w2, w3: IN STD_LOGIC ;
s: IN STD_LOGIC_VECTOR(1 DOWNTO 0) ;
f: OUT STD_LOGIC ) ;
END mux4to1 ;
w4
s2
s3
w7
s0
s1
w0
w1
w2
w3
w3
f
00
01
CASE statement
The CASE statement can only appear inside a process.
Syntax
case <expression> is
when <value> =>
statements;
when <value> =>
statements;
[ when others =>
statements; ]
end case;
Example
LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
ENTITY
VHDL Summary
A functional circuit block comprises an entity and at least one architecture. Also, a library clause and a use
clause are usually present.
Note that the VHDL keywords are not case sensitive, although in some implementations variable and signa
Chapter 8
8.1. The expressions for the inputs of the ip-ops are
D2
= Y2 = wy2 + y 1 y 2
D1
= Y1 = w y 1 y 2
The output equation is
z = y 1 y2
8.2. The excitation table for JK ip-ops is
Present
state
y2 y1
Flip-op inputs
w=0
Output
w=1
J2 K 2
J1 K 1
J2 K 2
SEQUENTIAL CIRCUITS
Sequential Circuits
1
Two Types of Switching Circuits
Combinational Circuits
Combinational circuits have only input and output.
Output depends on input.
Example: AND,OR,NAND,NOR,XOR etc
Sequential Circuits
Sequential circuits have
VHDL Code
DFlipFlop
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity dflipflop is
Port ( D : in STD_LOGIC;
Resetn : in STD_LOGIC;
clock : in STD_LOGIC;
Q : out STD_LOGIC);
end dflipflop;
architecture Behavioral of dflipflop is
begin
Process( Resetn, Cloc
VHDL Code
DFlipFlop
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity dflipflop is
Port ( D : in STD_LOGIC;
Resetn : in STD_LOGIC;
clock : in STD_LOGIC;
Q : out STD_LOGIC);
end dflipflop;
architecture Behavioral of dflipflop is
begin
Process( Resetn, Cloc
Useful
Combinational
Basic Blocks in
VHDL
This lecture has much material that you should already
know. I give it here for those students who may not know
and for reference in your projects.
Decoders
A decoder is a circuit that converts coded inputs into c
NAND-ONLY LOGIC CIRCUITS
Any logic circuits can be transformed to an
implementation where only NAND gates (and inverters)
are used.
The general approach to finding a NAND-gate
realization: Use DeMorgans theorem to eliminate all the
OR operations.
NAND-O
NAND-ONLY LOGIC CIRCUITS
Any logic circuits can be transformed to an
implementation where only NAND gates (and inverters)
are used.
The general approach to finding a NAND-gate
realization: Use DeMorgans theorem to eliminate all the
OR operations.
NAND-O
DeMorgans Theorems
Handout
Dr. Pang
DeMorgan s
DeMorgans Theorems
DeMorgans Theorems are two additional
simplification techniques that can be used to
simplify Boolean expressions. Again, the simpler
the Boolean expression the simpler the resulting
express
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Example VHDL Entity - 2 to 4 Decoder
Output Bit
0 - LSB
2
3 - MSB
outputs
A
0
0
1
1
1
inputs
K
0
0
0
1
B
0
1
0
1
L
0
0
1
0
M
0
1
0
0
N
1
0
0
0
decoder Truth Table
A 2 to 4 decoder generates an output signal on its output pins that is dependent on the bina
Fundamentals of VHDL Programming
Introduction:
VHDL (Very High Speed IC Hardware description Language) is one of the
standard hardware description language used to design digital systems. VHDL can
be used to design the lowest level (gate level) of a digit
Finite State Machine Design
One machine can do the work of fifty ordinary men; no
machine can do the work of one extraordinary man.
-E. Hubbard
Nothing dignifies labor so much as the
saving of it.
-J. Rodgers
Introduction
In this chapter we begin our exam
DIGITAL CODE LOCK USING VHDL
2012
CHAPTER 1
INTRODUCTION
1.1 The key concept of Digital Code Lock
The circuit described here is of an electronic combination lock for
daily use. It responds only to the right sequences of four digits that are keyed
in remot
Switching Algebra and Its Applications
1
Zvi Kohavi and Niraj K. Jha
Switching Algebra
Basic postulate: existence of two-valued switching variable that takes two
distinct values 0 and 1
Switching algebra: algebraic system of set cfw_0,1, binary operations
Design and implementation of Digital Code Lock using VHDL
INTRODUCTION
The circuit described here is of an electronic combination lock for daily use. It
responds only to the right sequences of four digits that are keyed in
remotely. If a wrong key is touc
FULL ADDER
AIM:
To design, implement and analyze all the three models for full adder.
Design:
First, VHDL code for half adder was written and block was generated. Half adder block as component and basic gates, code for full adder is written. The truth tab
Switching Algebra and Its Applications
Zvi Kohavi and Niraj K. Jha
1
Switching Algebra
Basic postulate: existence of two-valued switching variable that takes two
distinct values 0 and 1
Switching algebra: algebraic system of set cfw_0,1, binary operations