ECE 442 Electronic Circuits
Homework 4
Solutions
1. vDS = 3V > vGS Vt = 3 2 = 1V , hence the transistor is in saturation.
Expression for the drain current in the saturation is
1W
2
iD = kn ( vGS Vt )
2L
Since parameters of the device stay constant
1mA
A
2
ECE 442 Electronic Circuits
Homework 5
Solutions
1. Implement the function
Y = AB + ABC
using the fewest devices possible. Show the finished schematic. Assume that input variables
and complements are available to drive the system
2. Sedra P10.30
Y = ABC +
ECE 442 Electronic Circuits
Homework 9
Solutions
1. Sedra P6.5
iDN = iDP
1
1
W 2
W 2
nCox VoVn = p Cox VoVp
2
2
L n
L p
we also have g mn = g mp
gm =
2I D
Vovn = Vovp
Vov
W
L p n 460
=
=
= 2.88
(1), (2)
p 160
W
L n
2. Sedra P6.21
I o = I REF = 5
ECE 442 Spring 2008
1. Suggested
HW#6 Solutions
PSpice setup and simulation results are shown below.
The diode prevents the capacitor from discharging; C will hold a constant voltage across its terminals, corresponding
to the dierence between V inmax = 1V
3.118)
From Equation 3.57: C j =
C j0
VR
1 +
V
0
For reverse bias of 1v
0.6 *10 12
Cj =
0.45 pF
1
1 3
1 +
0.75
For reverse bias of 10v
0.6 *10 12
Cj =
0.247 pF
1
10 3
1 +
0.75
m
3.121)
(a)
J = Jn + J p
V
Dp
Dn VT
e 1 (Equation 3.64)
I = A( J n +
P 4.19)
Given 2 points in the saturation region.
1
Slope of saturation region =
ro
1 rise 2.2mA 2mA 0.2mA
slope = =
=
=
= 0.00005 A
V
ro run
8V 4V
4V
ro = 20k
To find other 2 parameters, must interpolate this linear line back to x-axis.
See page 254 for a
4.113)
Find device widths given max propagation delay of 60ps when loaded with a 0.05pF capacitor. W/L ratio of the
PMOS device is twice as large as the W/L ratio of the NMOS device.
t PHL + t PLH
2
Apply equation 4.156
tP =
2C
tP =
( L) (V
kn ' W
n
DD
V
ECE 442 Electronic Circuits
Homework 3
Solutions
1.
a) Diode is on V = 0, I = 10/5K = 2mA
b) Diode is off I = 0, V = 10V
c) Assume diode D1 is off, D2 is on I1 = 0, V = 10V assumption correct (D1 reverse-biased).
Then, I2 = [10 (10)]/5K = 4mA
2.
Utilizing
ECE 442 Electronic Circuits
Homework 1
Solutions
1. Given the circuit shown:
(a) Find the effective resistance as seen by the
capacitor terminals, R12.
(b) Determine the Thvenin voltage as seen from
node 1 to ground, VTh-1,0.
(c) Determine the Thvenin vol
PSPICE Tutorial
This tutorial should help you with using PSPICE if you have never used it before.
We will construct and analyze a CMOS inverter as the example. In this tutorial, we will
use the PSPICE on Everitt Lab Student Lounge computers. Other version
ECE 442 Electronic Circuits
Homework 2
Due Friday February 1, 2008
1. Sedra P3.108
2. Sedra P3.112
3. Calculate the barrier voltage across the depletion region of a silicon diode at T = 300 oK
given that ND = 1015/cm3 and NA=1018/cm3.
4. The depletion-lay
ECE 442 Electronic Circuits
Homework 1
Due Friday January 25, 2008
1. Given the circuit shown:
(a) Find the effective resistance as seen by the
capacitor terminals, R12.
(b) Determine the Thvenin voltage as seen from
node 1 to ground, VTh-1,0.
(c) Determi
ECE 442 Electronic Circuits
Homework 3
Due Friday, February 8, 2008
1. For the circuits shown in Figure 1, nd the values of the voltages and currents indicated.
Figure 1.
2. Assuming that the diodes in the circuits of Figure 2 are ideal, nd the values of
ECE 442 Electronic Circuits
Homework 4
Due Friday February 15, 2008
1. Consider an enhancement NMOS transistor with Vt = 2 V which conducts a current
iD = 1 mA when vGS = vDS = 3 V . What is the value of iD for vDS = 5 V ? Calculate the
value of the drain
ECE 442 Electronic Circuits
Homework 6
Due Monday, March 10, 2008
1. Using PSpice, plot the output voltage of the clamping circuit shown for two
cycles of input signal. What will the dc voltage of the output become after several
input cycles?
C=2 F
1V
0
V
ECE 442 Electronic Circuits
Homework 8
Due Friday March 28, 2008
Problem 1
For the circuit shown, determine the values of:
a) v1
b) v0
c) i1
d) i2
e) i0
f) iL
Assume that op amp is ideal.
Transform the circuit into noninverting configuration. Find the vol
ECE 442 Electronic Circuits
Homework 5
Due Friday February 22, 2008
1. Implement the function
Y = ( AB + BC ) ( CD + AD )
using the fewest devices possible. Show the finished schematic. Assume that input variables
and complements are available to drive th
ECE 442 Electronic Circuits
Homework 5
Due Friday April 4, 2008
1. Sedra P6.5
2. Sedra P6.21
3. Sedra P6.55
4. If WCox / 2L = 50 A / V 2 , VT = 0.8 V, and = 0.02, calculate the ratio Io/Iin for the
circuit shown below, when Iin = 72 A and VDS2 = 6 V. Assu
ECE 442 Electronic Circuits
Homework 11
Due Friday April 25, 2008
1. Design a MOS cascode amplifier using PSpice. Refer to the Fig. 6.36(a) for the amplifier
schematic. Use a basic current mirror circuit with two PMOS transistors instead of a
current sour
ECE 442 Electronic Circuits
Homework 10
Due Friday, April 18, 2008
1. For the differential amplier shown in Fig. 1, it is known: I = 1mA, k
W
L
= 25mA/V 2 , RD = 2k.
Figure 1.
a) Assuming perfect matching (k=1), nd ID1 , ID2 , VOV 1 , VOV 2 , Ad .
b) Repe