Department of Computer Science and Engineering
BRAC University
CSE 260: Digital Logic Design
Experiment # 1
Familiarization of Fundamental Logic Gates
Objective:
To get familiarized with fundamental logic gates and demonstrate the input output
relationsh

CSE 260 : Digital Logic Design
Number Systems and Codes
Binary Coded Decimal (BCD)
Decimal numbers are more natural to humans.
Binary numbers are natural to computers. Quite
expensive to convert between the two.
If little calculation is involved, we can

CSE 260 Digital Logic Design
Registers, Memory
BRAC University
Introduction: Registers
An n-bit register has a group of n flip-flops and some
logic gates and is capable of storing n bits of
information.
The flip-flops store the information while the gat

CSE 260
BRAC University, Summer 2014
IC and Bread Board
How to use bread board
Input and output gates of
IC
Lets solve it together
4
1
2
3
6
10
5
12
13
9
11
8
Boolean Functions (Solve ?)
Examples:
SOP,
minte
-rm
F1= xyz'
F2= x + y'z
F4=xy'+x'z
F3=(x'y'z)

CSE 260
BRAC University, Summer 2014
IC and Bread Board
Input and output gates of
IC
How to use bread board
Boolean Functions (Solve ?)
Examples:
SOP,
minte
-rm
F1= xyz'
F2= x + y'z
F4=xy'+x'z
F3=(x'y'z)+(x'yz)+(xy')
From the truth table, F3=F4.
Can you

CSE 260
Digital Logic Design
Fall 2014
Md. Shamsul Kaonain
Khadija Rasul
?
PHONE or TAB
2
Lecture -1
Please
Switch Phones
OFF
or
Put them on
SILENT
Mark Distribution
Participation & Attendance
Assignments( 5 to 6)
Quiz
Lab
Midterm Exam
Final Exam
5
10
10

Tabulation Method
The Quine-McCluskey Method
K-map going big!
6 variable k-map
K-map works well upto 4 variable, but when number of variable is
more than that trouble starts as it gets difficult to recognize patters
leading to wrong selection
Quine McCl

CSE260 Digital Logic Design
Karnaugh
Maps
Khadija Rasul
Fall 2014
CSE260 Digital Logic Design
The map method
The map method provides a simple procedure for minimizing Boolean functions.
The map is made up of squares where each square represent a minterm.

CSE 260 DIGITAL LOGIC DESIGN
Combinational Circuits- 1
Review: Try it by yourself
A car garage has a front door and one window,
each of which has a sensor to detect whether it
is open. A third sensor detects whether it is dark
outside. A security system

Announcement
2 Quizes at the end of class, so stay
tuned!
Theorem and Postulate
Postulates are assumed to be true and we
need not prove them. They provide the
starting point for the proof of a theorem.
A theorem is a proposition that can be
deduced fro

CSE 260 Digital Logic Design
Memory
BRAC University
What is Memory Unit?
A memory unit is a collection of registers together with associated
circuits needed to transfer information in and out of registers.
Binary cell: Anelementaryunitofcomputerstorage (i

Lecture 2
PART 2
Quizs on Monday, 13th October, on topics
covered so far
Lecture 1 , lecture 2 and todays lecture
Conversion between Bases
In general, conversion between bases can be
done via decimal:
Base-2
Base-3
Base-4
Base-R
Base-2
Base-3
Decimal
Ba

Even and odd Parity
0 means correct,
1 means wrong!
When we send binary data we need to count the number of 1s
that are present in it. For example sending the ASCII character
'B' 1000010. This has two occurrences of 1. We can then apply
another bit to th

CSE 260
Digital Logic Design
Combinational Circuit-3
BRAC University
Arithmetic Circuits: Comparator
Magnitude comparator: compares 2 values
A and B, to see if A>B, A=B or A<B.
How do we compare two 4-bit values A
(a3a2a1a0) and B (b3b2b1b0)?
If (a3 > b

Department of Computer Science and Engineering
BRAC University
CSE 260: Digital Logic Design
Experiment # 3
Parity Generator and Checker
Objective:
To design and implement an Even parity Generator and Even parity checker using XOR
gates) (IC-7486).
Requi

CSE 260
DIGITAL LOGIC DESIGN
Sequential Logic, RS Flip-Flop,
D Flip-Flop, JK Flip-Flop, T Flip-Flop
BRAC University
Introduction
A sequential circuit consists of a feedback path, and employs
some memory elements.
Combinational
outputs
Memory outputs
Comb

CSE 260 Digital Logic Design
Registers, Memory
BRAC University
Introduction: Registers
An n-bit register has a group of n flip-flops and some
logic gates and is capable of storing n bits of
information.
The flip-flops store the information while the gat

CSE 260
DIGITAL LOGIC DESIGN
Counters
BRAC University
01/27/16
1
Introduction: Counters
Counters are circuits that cycle through a specified
number of states.
Two types of counters:
synchronous (parallel) counters
asynchronous (ripple) counters
Rippl

CSE 260
DIGITAL LOGIC DESIGN
Sequential Logic, RS Flip-Flop,
D Flip-Flop, JK Flip-Flop, T Flip-Flop
BRAC University
Introduction
A sequential circuit consists of a feedback path, and employs
some memory elements.
Combinational
outputs
Memory outputs
Comb

CSE 260
BRAC University
Theorem and Postulate
Postulates are assumed to be true and we
need not prove them. They provide the
starting point for the proof of a theorem.
A theorem is a proposition that can be
deduced from postulates. We make a
series of l