SC311
Introduction to Logic Design
Lecture 3: Combinational Logic II
Logic Functions: Rationale for Simplification
Logic Minimization: reduce complexity of the gate level implementation
reduce number of literals (gate inputs)
reduce number of gates
red
SC311
Introduction to Logic
Design
Lecture 7: Programmable
Logic Devices
PLA
PLA (Programmable Logic Array) has an
AND plane followed by an OR plane.
Based on the SOP (Sum of Products).
CPLDs and FPGAs
CPLD (Complex Programmable Logic
Device) consists of
SC311
Introduction to Logic Design
Lecture 8: Multiplexers, Demultiplexers
1
Making connections
Direct point-to-point connections between gates
wires we've seen so far
Route one of many inputs to a single output - multiplexer
Route a single input to one o
SC311
Introduction to Logic Design
Lecture 3: Combinational Logic II
Logic Functions: Rationale for Simplification
Logic Minimization: reduce complexity of the gate level implementation
reduce number of literals (gate inputs)
reduce number of gates
red
SC311
Introduction to Logic Design
Lecture 2: Combinational Logic I
A Brief History of Mathematical
Logic
1847
Key elements of mathematical
logic used today were
established.
George Boole:
A Mathematical Analysis of Logic
Clearly established the algebra
o
SC311
Introduction to Logic
Design
Lecture 4: Two Level and
Multi Level Optimization,
Hazards
a
b
Critical path: longest delay path to output
Optimization: reduce size of logic on non-critical paths by using multiple
levels
4
e
f
g
b
4
c
d
a
6
6
6
F1 = (a
SC311
Introduction to Logic
Design
Lecture 4: K Maps
Gate Logic: Two-Level
Karnaugh Map Method
hard to draw cubes of more
Simplification than 4 dimensions
K-map is an alternative method of representing the truth table that
helps visualize adjacencies in u