Decoding
An nbit binary code is capable of representing up to 2n distinct elements Decoding is the conversion of an nbit input code to an mbit output code with n m 2n We are dealing with ntomli
State Diagrams:
Mealy: The present state is inside of the bubble, the arrow shows the next state, and X/Y shows Input X / Output Y Moore: The bubble has present state / output, and the inputs are on t
Sequential Circuit Design (p. 267)
The design of the circuit consists of choosing the flipflops and finding a combinational circuit structure which, together with the flipflops, produces a circuit
Finding a State Diagram for a Sequence Recognizer
implement a direct reset to 0 for all flipflops recognize the sequence 1101 on X by making Z=1. When previous 3 inputs to the circuit were 110 and
Finding a State Diagram for BCDtoExcess3 Decoder (p.273)
In this example, the function of the circuit is similar to previous excess3 example except that the inputs, rather than being presented to
JK and T Flip Flops:
First, take a look at both in Logisim and see if you can figure out what they do. Then, see table below:
Chapter 5: Arithmetic Functions and Circuits
In this chapter, the focus co
Binary Subtraction
If no borrow occurs into the most significant position, then we know that the substrahend is not larger than the minuend and that the result is positive and correct. If the result
Subtraction with Complements
Subtraction of two ndigit unsigned numbers, MN, in binary
Example 52: Unsigned Binary Subtraction by 2s Complement Addition
State Tables Continued:
The above is called a onedimensional table. The present state and input combinations are combined into a single column of combinations. Another way to do this is to use a two
Sequential Circuit Analysis
The outputs and the next state of a sequential circuit are a function of the inputs and the present state. Input Equations: needed: type of flip flops used, list of Boolean
Decoder Expansion
process to construct any decoder with n inputs and 2n outputs
To construct a 3to8line Decoder:
Visual Implementation in Logisim (file posted with notes)
MUX Continued:
using 3state buffers for implementation:
Logism Implementation (file provided)
Page Down.
How about using TGs to solve the problem:
Implementation in Logism
Using 3state buffer to cre
Combinational Function Implementation:
Using Decoders: A decoder provides the 2n minterms of n input variables. So, we can use a decoder to implement any boolean function by combining the minterms in
Using Multiplexers to implement combinational logic circuits
Implemented in MML:
page down.
How about using a Dual 4to1 MUX to implement same problem:
Implemented in MML:
Chapter 6: Sequential Circuits
Read book on how single bit is stored Synchronization is achieved by using a clock generator o Produces periodic chain of clock pulses Things wait for a clock pulse to
Sequential Circuits Continued.
Logic Simulation of SR Latch:
SR Latch with NAND Gates

Whats different? The resting state is at 1 with 0 causing a change to the latch. If both inputs are 0, this will
EdgeTriggered FlipFlops:
Transparency:
An edgetriggered flipflop ignores the pulse while it is at a constant level and triggers only during a transition of the clock signal. Some are on the positi
Binary AdderSubtractors
In Logisim:
Signed Binary Numbers
SignedMagnitude System: Leftmost bit is the sign bit 11001 (9 in signedmagnitude, but 25 in unsigned) SignedCompliment System use this t