Tutorial #6
9.15 Use the Booth algorithm to multiply 23 (multiplicand) by 29 (multiplier),
where each number is represented using 6 bits.
Using M=010111 (23) and Q = 010011 (19) we should get 437 as the result.
A
Q
Q1
M
000000
010111
0
010011
Initial
1011
Tutorial #9
Questions:
6.2 How are data written onto a magnetic disk?
The write mechanism is based on the fact that electricity flowing through a coil
produces a magnetic field. Pulses are sent to the write head, and magnetic
patterns are recorded on the
Tutorial #5
Question:
9.1 Briefly explain the following representations: sign magnitude, twos
complement, biased.
SignMagnitude Representation: In an N-bit word, the left-most bit is the sign (0
= positive, 1 = negative) and the remaining N 1 bits compris
Computer Organization (2) CSE321b
Winter 2014
Tutorial 4
Questions:
7.1 List three broad classifications of external, or peripheral,
devices.
1. Human readable: Suitable for communicating with the
computer user such as keyboard and screen
2. Machine reada
Computer Organization (2) CSE321b
Winter 2014
Tutorial 3
Refreshment Rate:
5.2 Consider a dynamic RAM that must be given a refresh cycle 64
times per 1ms. Each refresh operation requires 150 ns; a memory
cycle requires 250 ns. What percentage of the memor
Computer Organization (2) CSE321b
Winter 2014
Tutorial 1
Questions:
5.2 What are two senses in which the term random-access
memory is used?
(1) A memory in which individual words of memory are directly
accessed through wired-in addressing logic.
(2) Semic
Computer Organization (2) CSE321b
Winter 2014
Tutorial 2
Questions:
5.9 What is a parity bit?
A bit appended to an array of binary digits to make the sum of all
the binary digits, including the parity bit, always odd (odd parity)
or always even (even pari
Computer Organization (II) CSE 321b
Third Year, Computer & Systems Engineering
Presented to: Dr/ Hazem - Eng. Hesham
Presented By: Mahmoud Ibrahim El-Desoky
Question 1:
(a)
In One second 15 refresh cycles happen occur.
60 Cells are
Each cycle 4 Cells are
CSE 401: Computer Engineering (II)
Fourth Year, Communication Engineering
Solution to Assignment #1
Due date: Sunday, March 15th, 2015
1. A 512K4 bit DRAM is organized into four 1024512 cell arrays. The DRAM goes through 15
refresh cycles every second (wh
CSE 401: Computer Engineering (II)
Fourth Year, Communication Engineering
Solution to Assignment #2
1. Consider a magnetic disk in which the physical addresses (2,4,9) and (3,5,4) are mapped to the logical addresses 1288 and 1859, respectively.
(a) What i
CSE 321a: Computer Organization (1)
Third Year, Computer & Systems Engineering
Assignment #1- Solution
Due date: Thurs day, 6th November, 2014
1. Suppose you are given a task to evaluate the performance of two processors
a. Calculate the values of the un