Experiment 2 - Combinational Logic Circuits
Combinational logic circuits are defined as circuits whose outputs depend only on the present value of their
1. From the problem statement find the number o
Experiment 3 Arithmetic Logic Circuits
An arithmetic and logic unit is a combinational logic circuit capable of performing several arithmetic and logic
functions, selected by a set of function-select inputs, on a pair of n-bi
Oct. 29, 2011
Experiment 4 Flip-flops
1 Construct a SR latch with an enable with a single 74LS00, and connect its three inputs S, R and C to three
switches and its two outputs Q and Q to two logic monitors so that you may v
; convert string number to binary!
; this program written in 8086 assembly language to
; convert string value to binary form.
; this example is copied with major modifications
; from macro "scan_num" taken from c:\emu8086\inc\emu8086.inc
Experiment 4- Flip Flops
The objective of this lab is to investigate a basic sequential circuit made with latches and flip
difference between these two sequential devices is that a flip-flops outputs change only
at specific times determined by
Nov. 22, 2011
Experiment 10 Traffic Light Controller
The system has 4 input sensors, north (N), south (S), east (E) and west (W), and 6 output lights, N/S (red,
yellow and green), and E/W (red, yellow and green). Four data
Nov. 10, 2011
Experiment 9 Design of Finite State Machines Using Xilinx ISE 12.1
Problem description / not current!
Design a synchronous detector with an input labeled x and an output labeled z. The detector should check x
Nov. 3, 2011
Experiment 8 Design of Finite State Machines Using Xilinx ISE 12.1
Design a circuit that meets the following specifications:
1. The circuit has one input w, and one output z.
2. All changes
Oct. 27, 2011
Experiment 7 Using Language Templates with Xilinx ISE
The objective of this lab is to implement the following functions
F = (A,B,C,D)(0,3,5,6,9,10,12,15)
G = (A,B,C,D)(1,2,5,6,8,11,12,15)
Oct. 12, 2011
Experiment 6 Programming of the Digilent XCR Plus
Board Using Xilinx ISE Design Suite
Designing a circuit to be programmed onto a CPLD or FPGA will involve 4 steps:
1. Design The description of the circuit cre
Oct. 6, 2011
Experiment 5 Counters
Synchronous Sequential Logic Circuit Design Procedure
1 From the information given in the problem statement create a state diagram, then a state output table. You
may start directly with the state outp
; this example calculates the sum of a vector with
; another vector and saves result in third vector.
; you can see the result if you click the "vars" button.
; set elements for vec1, vec2 and vec3 to 4 and show as "signed".