ELEE2790U: Electric Circuits
Assignment 4
Due date: Friday, Nov. 25, Noon
Late penalty: 50%/day
Q1. [25] The switch in the circuit shown below is closed at t=0sec, and opened
again at t=1.0sec. Find the voltage across the capacitor at t=2.0sec.
Q2. [25] T

Question 1:
y
1
KVL at loop 1:
KCL at node y:
(5) v x 0 v x 5 V
3v x
vy
13
iz 0 v y 13(3v x iz )
13[3(5) 14] 13 V
Question 2:
KCL at node 3:
Let i0 = i1 + i2 + i3, where i1, i2 and i3 are the
contributions to i0 due to the 37V, 16V, and
1mA sources,

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 14.5
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
763 (1)
Approximation of Filter Response
763
14.5.2 Chebyshev Response
The Chebyshev response provides an equiripple passband behavior, i.e., with equal

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
778
778 (1)
Chap. 15
Digital CMOS Circuits
This is, of course, equivalent to viewing M1 as a resistor of value Ron1 =
[n Cox (W=L)RD (VDD , VTH )],1 and hence Vou

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.2
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
799 (1)
CMOS Inverter
799
Interestingly, the denominator of (15.71) represents the inverse of the on-resistance of M2 when
it operates in the deep triod

BR
Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.1
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
779 (1)
General Considerations
779
5A
B
A
Inv1
VDD = 1.8 V
Inv2
Block 2
Block 1
(a)
1.675 V
1.8 V
Inv2
Inv1
(b)
Figure 15.5 (a) Two inverters separated

BR
Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
774
774 (1)
Chap. 14
Analog Filters
61. Following the methodology outlined in Examples 14.25 and 14.28, design filters for the
Butterworth and Chebyshev transfer

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 14.5
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
761 (1)
Approximation of Filter Response
761
How are these poles located in the complex plane? As an example, suppose n = 2. Then,
p1 = !0 exp j 34
5

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.2
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
803 (1)
CMOS Inverter
803
Solution
We note that the derivation leading to Eq. (15.91) is completely general and independent of the
I/V characteristics o

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
788
788 (1)
Chap. 15
Digital CMOS Circuits
Exercise
How much average power is consumed if the circuit runs at a frequency of 1 GHz.
15.2 CMOS Inverter
Perhaps the

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
806
806 (1)
Chap. 15
Digital CMOS Circuits
Exercise
What happens if M4 is omitted?
The above example reveals that the PMOS section must remain off if A or B (or b

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
762 (1)
762
Chap. 14
Analog Filters
j
p
1
228 pF
3
p
2
3
V in
1 k
1 k
1 k
4.52 pF
p
Vout
109.8 pF
3
(a)
(b)
Figure 14.50
[2 (1:45 MHz)]2
= s2 , [4 (1:45 MHz)
cos(

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
796 (1)
796
Chap. 15
Exercise
What happens if VTH 1
Digital CMOS Circuits
= VDD =4 but jVTH 2 j = 3VDD =4?
15.2.3 Dynamic Characteristics
As explained in Section

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.4
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
809 (1)
Chapter Summary
809
In CMOS logic, the PMOS and NMOS sectios are called dual of each other. In fact, given
one section, we can construct the oth

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
766 (1)
766
Chap. 14
Analog Filters
Since cosh,1 2 1:317, Eq. (14.176) yields
cosh2 (1:317n) = 3862
(14.177)
n > 3:66:
(14.178)
and hence
We must therefore select

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.1
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
785 (1)
General Considerations
785
TF , is defined as the time required for the output to go from 90% of VDD to 10% of VDD . In
general, TR and TF may n

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
794
794 (1)
Chap. 15
Digital CMOS Circuits
degeneration?
Noise Margins Recall from Example 15.6 that a digital inverter always exhibits a smallsignal voltage gain

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.3
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
805 (1)
CMOS NOR and NAND Gates
805
Vin = Vout = VDD =2 in either side of Eq. (15.45):
VDD
VDD
2
Ipeak = 21 n Cox( W
L )1 ( 2 , VTH 1 ) (1 + 1 2 ):
(15.

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.2
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
791 (1)
CMOS Inverter
791
requires that
VDS2 = 0
(15.40)
Vout = VDD :
(15.41)
and hence
From another perspective, M2 operates as a resistor of value
Ron

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.1
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
777 (1)
General Considerations
777
current from RD and Vout = VDD , ID RD can be near zero. Thus, as sketched in Fig. 15.2(b),
the input/output characte

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 14.6
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
773 (1)
Chapter Summary
773
50. Repeat Example 14.28 but with two Tow-Thomas biquads.
51.
52.
53.
54.
55.
56.
57.
58.
59.
60.
Design Problems
Design the

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.2
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
795 (1)
CMOS Inverter
For example, if VDD
795
= 1:8 V and VTH 1 = 0:5 V, then VIL = 0:8 V.
Exercise
Explain why VIL must always exceed VTH 1 .
We now tu

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.1
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
787 (1)
General Considerations
787
which, from (15.6), translates to
n Cox W
L (VDD , VTH )VDD :
ID =
1 + n Cox W
L RD (VDD , VTH )
(15.31)
Alternativel

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Wiley/Razavi/Fundamentals of Microelectronics
Sec. 15.2
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
801 (1)
CMOS Inverter
801
VDD
M2
V in
Vout
M1
M 1
Figure 15.25
Solution
Placing the two on-resistances in series, we have
0 =
Ron1 jjRon
1
1
1
jj
0
0
n

BR
Wiley/Razavi/Fundamentals of Microelectronics
Sec. 14.6
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
771 (1)
Chapter Summary
771
16. With the aid of the observations made for Eq. (14.25), determine a condition for the low-pass
filter of Fig. 14.29 to ex

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
800
800 (1)
Chap. 15
Digital CMOS Circuits
where the negative sign on the right accounts for the flow of the current out of the capacitor. Using
(15.69) to solve

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Wiley/Razavi/Fundamentals of Microelectronics
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
790 (1)
790
Chap. 15
VDD
VDD
V in
Vout
V in
V out
M 1 Off
VDD
M2
Pullup
Device
Digital CMOS Circuits
Vout
M1
M 2 Off
M1
VDD V in
(a)
(b)
(c)
Figure 15.17 (a) Pull

BR
Wiley/Razavi/Fundamentals of Microelectronics
772
[Razavi.cls v. 2006]
June 30, 2007 at 13:42
772 (1)
Chap. 14
Analog Filters
28. A KHN biquad must exhibit a peaking of only 1 dB in its low-pass response. Determine the
relationship required among the c