PART I. FROM SOFTWARE TO HARDWARE 355
The ones complement representation (state) of a value , given a word width N
(modulus 2N=M), is
Subtracting both definitions together we may eliminate M
ii The interpretations possible given the codes shown are
Repres
370 APPENDIX B. SOLUTIONS TO EXERCISES
Figure B.12: Control word format for question one
Figure B.13: Control unit satisfying question two
Question two
First we compose the state assignment table (Table B.4). Only three states are
necessary, hence only tw
PART I. FROM SOFTWARE TO HARDWARE 365
Figure B.8: Q-m solutions to question one (i)
ii The logic for a 4-bit look-ahead carry is given by
366 APPENDIX B. SOLUTIONS TO EXERCISES
Figure B.9: Q-m solutions to question one (ii)
iii A 4-bit parallel adder with
360 APPENDIX B. SOLUTIONS TO EXERCISES
Figure B.4: An RS-latch at switch level
Fan-out must be traded for operation speed. The implementation technology
will set limits on the product of these. Power dissipation must also be traded for
operation speed. A
PART I. FROM SOFTWARE TO HARDWARE 375
Question two
The register relative
HexStringToCard is
addressing
String
Value
Error
Index
mode
referencing
for
procedure
+12(fp)
+9(fp)
+6(fp)
3(fp)
and that for function Random is
NextSeed
Seed
Random
+8(fp)
+12(fp)
380 APPENDIX B. SOLUTIONS TO EXERCISES
It can be shown that A is a minimum with respect to N if and only if x=y and
provided that N is a perfect square. However we shall be content with the
example of N=16 where we observe that
ii The following are the ex
PART I. FROM SOFTWARE TO HARDWARE 385
Bit in error
d15
P0
P1
P2
P3
P4
Error vector (Binary)
00111
00001
00010
00100
01000
10000
Error vector (Hex)
07
01
02
04
08
10
Note that a syndrome error can be distinguished from a data error by the
syndrome parity!