5.1. COMBINATIONAL SYSTEMS 105
Figure 5.4: Exclusive-or function implemented using AND,OR and NOT gates
Figure 5.5: Two-level AND/OR gate structures
AND/OR structures
Because every truth function may be realized as either the standard product of
sums or t
120 CHAPTER 5. ELEMENT LEVEL
Figure 5.13: Moore and Mealy state machines
dependent on tpd, the propagation delay of the gates employed. Here lies a
problem.
5.1. COMBINATIONAL SYSTEMS 121
Figure 5.14: Clock whose frequency is determinable
In combinational
5.1. COMBINATIONAL SYSTEMS 115
Figure 5.11: System with two stable states
5.2.2
Specification
Temporal logic
A theory is needed on which to base usable methods of specifying systems which
change with time. Temporal logic is at present an active field of r
110 CHAPTER 5. ELEMENT LEVEL
which it flows is simply a wire. Charging thus refers to the build up of charge
in a capacitance at the switching input of a transistor.
The charging time is totally dependent on the operating potential of the switch
and is re
5.1. COMBINATIONAL SYSTEMS 125
Figure 5.17: RS latch with added set, clear and enable inputs
The input gating allows a clock to switch it on and off so that the system will
ignore data except when it is enabled. When enabled, output will follow input
with
130 CHAPTER 5. ELEMENT LEVEL
Figure 5.23: The ones-catching problem
Table 5.7: Progr ammable functions of a JK flip-flop
Operation
Control
Effect
Input
Not Input
Toggle
Set
Reset
J=1, K=0
J=0, K=0
J=1, K=1
Synchronous
Synchronous
Synchronous
Asynchronous
150 CHAPTER 6. COMPONENT LEVEL
Figure 6.6: K-maps for Moore machine to detect the sequence 1001
greater importance is the simplification of the combinational logic design
required. Removing a single flip-flop halves the size of the truth table and each
K-
6.1. COMBINATIONAL SYSTEM DESIGN 145
You should verify for yourself that further reduction is impossible in the
examples shown.
Minimization
Once the process of reduction has proceeded as far as possible, a minimal set of
prime implicants must be selected
140 CHAPTER 6. COMPONENT LEVEL
Figure 6.1: Karnaugh map for three variables
as the values cfw_0,1 of an output variable, a graphical form is usually much more
effective.
The graphical alternative to a truth table or Boolean function is the Karnaugh
map. A
5.1. COMBINATIONAL SYSTEMS 135
OR
AND
Question four
i Using Boolean algebra, derive implementations of the following function using
only
NAND
NOR
ii Devices which implement this truth function are available commercially and
are referred to as and-or-i